Patents by Inventor Cheng-Ping Kuo

Cheng-Ping Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10707135
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first well in the substrate on the first region and a second well in the substrate on the second region; removing part of the first well to form a first recess; and forming a first epitaxial layer in the first recess.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: July 7, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuan-Hao Tseng, Chien-Ting Lin, Shih-Hung Tsai, Po-Kuang Hsieh, Yu-Ting Tseng, Chueh-Fei Tai, Cheng-Ping Kuo
  • Patent number: 10629695
    Abstract: A semiconductor device includes a metal gate on a substrate, a polysilicon layer on the metal gate, a hard mask on the polysilicon layer, and a source/drain region adjacent to two sides of the metal gate. Preferably, the metal gate includes a ferroelectric (FE) layer on the substrate, a work function metal layer on the FE layer, and a low resistance metal layer on the work function metal layer.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: April 21, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shih-Hung Tsai, Po-Kuang Hsieh, Yu-Ting Tseng, Cheng-Ping Kuo, Kuan-Hao Tseng
  • Publication number: 20190221639
    Abstract: A method for fabrication a nanosheet device includes providing forming a stacked layer on a substrate, having first material layers and second material layers in different materials, alternatingly stacked up. The stacked layer is patterned to a stacked fin. A dummy stack is formed on the stacked fin. An etching back process is performed with the dummy stack with spacers to etch the stacked fin and expose the substrate. Laterally etches the first material layers and the second material layers, to have indent portions. Inner spacers fill the indent portions. A first/second source/drain layer is formed on the substrate at both sides of the dummy stack. Etching process is performed to remove the dummy gate of the dummy stack and the selected one of the first material layers and the second material layers between the inner spacers. Metal layer fills between the spacers and the inner spacers.
    Type: Application
    Filed: January 12, 2018
    Publication date: July 18, 2019
    Applicant: United Microelectronics Corp.
    Inventors: Kuan-Hao Tseng, Yu-Hsiang Lin, Shih-Hung Tsai, Po-Kuang Hsieh, Yu-Ting Tseng, Chueh-Fei Tai, Cheng-Ping Kuo
  • Publication number: 20190140068
    Abstract: A semiconductor device includes a metal gate on a substrate, a polysilicon layer on the metal gate, a hard mask on the polysilicon layer, and a source/drain region adjacent to two sides of the metal gate. Preferably, the metal gate includes a ferroelectric (FE) layer on the substrate, a work function metal layer on the FE layer, and a low resistance metal layer on the work function metal layer.
    Type: Application
    Filed: January 4, 2019
    Publication date: May 9, 2019
    Inventors: Shih-Hung Tsai, Po-Kuang Hsieh, Yu-Ting Tseng, Cheng-Ping Kuo, Kuan-Hao Tseng
  • Publication number: 20190131183
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first well in the substrate on the first region and a second well in the substrate on the second region; removing part of the first well to form a first recess; and forming a first epitaxial layer in the first recess.
    Type: Application
    Filed: November 7, 2017
    Publication date: May 2, 2019
    Inventors: Kuan-Hao Tseng, Chien-Ting Lin, Shih-Hung Tsai, Po-Kuang Hsieh, Yu-Ting Tseng, Chueh-Fei Tai, Cheng-Ping Kuo
  • Patent number: 10211313
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming an interlayer dielectric (ILD) layer around the gate structure; removing the gate structure to form a first recess; forming ferroelectric (FE) layer in the first recess; forming a compressive layer on the FE layer; performing a thermal treatment process; removing the compressive layer; and forming a work function metal layer in the recess.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: February 19, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shih-Hung Tsai, Po-Kuang Hsieh, Yu-Ting Tseng, Cheng-Ping Kuo, Kuan-Hao Tseng
  • Publication number: 20190019875
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming an interlayer dielectric (ILD) layer around the gate structure; removing the gate structure to form a first recess; forming ferroelectric (FE) layer in the first recess; forming a compressive layer on the FE layer; performing a thermal treatment process; removing the compressive layer; and forming a work function metal layer in the recess.
    Type: Application
    Filed: August 16, 2017
    Publication date: January 17, 2019
    Inventors: Shih-Hung Tsai, Po-Kuang Hsieh, Yu-Ting Tseng, Cheng-Ping Kuo, Kuan-Hao Tseng
  • Publication number: 20100134976
    Abstract: A heat dissipating pad structure of a notebook computer includes a retaining unit, a baffle wall and at least two air guide units (fans). Air can be entered from the bottom of the notebook computer. The external periphery of a ventilation hole is disposed on the baffle wall for enclosing a space area, such that the air guide unit keeps guiding air into the space area to increase the volume of air and produce a positive air pressure, and a fan installed in the notebook computer produces a negative air pressure suction, such that cold air is compressed, sucked and guided simultaneously into the computer for a heat exchange and a discharge of hot air from the interior of the computer, so as to achieve a better heat dissipating effect.
    Type: Application
    Filed: December 3, 2008
    Publication date: June 3, 2010
    Inventor: Cheng-Ping Kuo