Patents by Inventor Cheng Ping Lin

Cheng Ping Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240312983
    Abstract: The disclosure provides an electronic apparatus and a manufacturing method thereof. The electronic apparatus includes a first insulating layer, a first metal layer, a second metal layer, a PN junction assembly, and a transistor circuit. The first insulating layer includes a first surface and a second surface opposite to the first surface. The first metal layer is formed above the second surface. The second metal layer is formed on the second surface. The PN junction assembly is disposed on the first surface and electrically connected with the first metal layer and the second metal layer. The PN junction assembly includes a variable capacitor. The transistor circuit is electrically connecting with the second metal layer.
    Type: Application
    Filed: May 22, 2024
    Publication date: September 19, 2024
    Applicant: Innolux Corporation
    Inventors: Tang Chin Hung, Chin-Lung Ting, Chung-Kuang Wei, Ker-Yih Kao, Tong-Jung Wang, Chih-Yung Hsieh, Hao Jung Huang, I-Yin Li, Chia-Chi Ho, Yi Hung Lin, Cheng-Hsu Chou, Chia-Ping Tseng
  • Publication number: 20240305056
    Abstract: A laser light source system is used to simultaneously irradiate a plurality of pads on a display substrate and a plurality of light emitting components. The laser light source system includes a laser light source, a collimator lens, a diffractive optical component and a refractive component. The laser light source is configured to provide a laser beam. The collimator lens is disposed on a path of the laser beam to generate a collimated beam. The diffractive optical component is disposed on a path of the collimated beam to generate a plurality of sub beams. The display substrate is disposed on a focal plane of the refractive component, so as to utilize the sub beams to bond the light emitting components to the pads.
    Type: Application
    Filed: December 27, 2023
    Publication date: September 12, 2024
    Inventors: YU-SHENG LIN, Shun-Ping Chiao, Yu-Chin Wu, Cheng-Han Chung, Yao-An Mo, Han-Chung Lai
  • Patent number: 12082927
    Abstract: A topical subcutaneous microcirculation detection device includes a first light source module, a second light source module, a lens plate, a first light sensor, and a second light sensor. The first and second light source modules are configured to emit first and second illumination beams, respectively. A flat plate portion of the lens plate is disposed to lean against a first portion of skin of a subject. A convex surface of a first convex lens portion of the lens plate is disposed to push into a second portion of the skin of the subject. The first and second illumination beams are reflected into first and second reflected beams by the first and second portions of the skin, respectively. The first and second reflected beams are transmitted to the first and second light sensors, respectively.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: September 10, 2024
    Assignee: Chung Yuan Christian University
    Inventors: Kang-Ping Lin, Cheng Lun Tsai, Shao-Hung Lu, Mei-Fen Chen
  • Publication number: 20240297168
    Abstract: The disclosure provides an electronic apparatus. The electronic apparatus includes an insulator, a driving unit, an electronic unit, and a circuit unit. The driving unit is overlapped with the insulator. The electronic unit is overlapped with the insulator. The circuit unit is electrically connected to the driving unit. The driving unit receives a signal from the circuit unit and drives the electronic unit.
    Type: Application
    Filed: May 14, 2024
    Publication date: September 5, 2024
    Applicant: Innolux Corporation
    Inventors: Tang Chin Hung, Chin-Lung Ting, Chung-Kuang Wei, Ker-Yih Kao, Tong-Jung Wang, Chih-Yung Hsieh, Hao Jung Huang, I-Yin Li, Chia-Chi Ho, Yi Hung Lin, Cheng-Hsu Chou, Chia-Ping Tseng
  • Publication number: 20240275919
    Abstract: A video and audio streaming transmission system is provided. The video and audio streaming transmission system includes a receiving end module, a first transmitting end module and a second transmitting end module. The first transmitting end module obtains a first audio signal, and sends the first audio signal to the receiving end module. The second transmitting end module obtains a second audio signal, and sends the second audio signal to the receiving end module. The receiving end module returns a processed audio signal to the first computer device according to the first audio signal and the second audio signal, so that the first computer device provides the processed audio signal to a conference module.
    Type: Application
    Filed: October 11, 2023
    Publication date: August 15, 2024
    Applicant: BENQ CORPORATION
    Inventors: Chao-Kuang Yen, Yu-Ping Huang, Chen-Chi Wu, Cheng-Pu Lin, Chia-Nan Shih, Jung-Kun Tseng
  • Publication number: 20240243466
    Abstract: A wireless briefing device includes a first antenna, a second antenna, and a ground plane. Each of the first antenna and the second antenna couples out a frequency band. A distance between the first antenna and the ground plane is between 0.2 and 0.3 times of a wavelength of the frequency band, and a distance between the second antenna and the ground plane is between 0.2 and 0.3 times of the wavelength of the frequency band.
    Type: Application
    Filed: June 19, 2023
    Publication date: July 18, 2024
    Applicant: BENQ CORPORATION
    Inventors: Yu-Ping Huang, Chun-Han Lin, Chen-Chi Wu, Chia-Nan Shih, Cheng-Pu Lin
  • Patent number: 12021037
    Abstract: Package structures and methods for forming the same are provided. The method includes forming a passivation layer having an opening and forming a first seed layer in the opening. The method further includes filling the opening with a conductive layer over the first seed layer and bonding an integrated circuit die to the conductive layer over a first side of the passivation layer. The method further includes removing a portion of the first seed layer to expose a top surface of the conductive layer and to partially expose a first sidewall of the passivation layer from a second side of the passivation layer and forming a second seed layer over the top surface of the conductive layer and over the first sidewall of the passivation layer.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: June 25, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Da Tsai, Cheng-Ping Lin, Wei-Hung Lin, Chih-Wei Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Publication number: 20230174772
    Abstract: A component (A1) thereof includes an epoxy resin having at least one of a naphthalene skeleton or a biphenyl skeleton. A component (A2) thereof includes a phenolic resin having at least one of the naphthalene skeleton or the biphenyl skeleton. A component (B) thereof includes a high molecular weight substance having structures expressed by at least formulae (b2) and (b3) out of formulae (b1), (b2), and (b3) and having a weight average molecular weight equal to or greater than 200,000 and equal to or less than 850,000. A component (C1) thereof includes a first filler obtained by subjecting a first inorganic filler to surface treatment using a first silane coupling agent expressed by formula (c1). A component (C2) thereof includes a second filler obtained by subjecting a second inorganic filler to surface treatment using a second silane coupling agent expressed by formula (c2).
    Type: Application
    Filed: March 25, 2021
    Publication date: June 8, 2023
    Applicant: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Cheng Ping LIN, Toshiyuki MAKITA, Naohito FUKUYA
  • Publication number: 20230098830
    Abstract: Package structures and methods for forming the same are provided. The method includes forming a passivation layer having an opening and forming a first seed layer in the opening. The method further includes filling the opening with a conductive layer over the first seed layer and bonding an integrated circuit die to the conductive layer over a first side of the passivation layer. The method further includes removing a portion of the first seed layer to expose a top surface of the conductive layer and to partially expose a first sidewall of the passivation layer from a second side of the passivation layer and forming a second seed layer over the top surface of the conductive layer and over the first sidewall of the passivation layer.
    Type: Application
    Filed: December 8, 2022
    Publication date: March 30, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Da TSAI, Cheng-Ping LIN, Wei-Hung LIN, Chih-Wei LIN, Ming-Da CHENG, Ching-Hua HSIEH, Chung-Shi LIU
  • Patent number: 11532564
    Abstract: Package structures and methods for forming the same are provided. The package structure includes an integrated circuit die and a package layer surrounding the integrated circuit die. The package structure also includes a redistribution structure over the package layer and electrically connected to the integrated circuit die. The redistribution structure includes a passivation layer and a conductive layer formed in the passivation layer. The integrated circuit die further includes a connector formed over the conductive layer and covered a top surface of the passivation layer. In addition, a bottom surface of the connector and a top surface of the connector are both wider than a neck portion of the connector.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: December 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Da Tsai, Cheng-Ping Lin, Wei-Hung Lin, Chih-Wei Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Publication number: 20210098384
    Abstract: Package structures and methods for forming the same are provided. The package structure includes an integrated circuit die and a package layer surrounding the integrated circuit die. The package structure also includes a redistribution structure over the package layer and electrically connected to the integrated circuit die. The redistribution structure includes a passivation layer and a conductive layer formed in the passivation layer. The integrated circuit die further includes a connector formed over the conductive layer and covered a top surface of the passivation layer. In addition, a bottom surface of the connector and a top surface of the connector are both wider than a neck portion of the connector.
    Type: Application
    Filed: December 14, 2020
    Publication date: April 1, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Da TSAI, Cheng-Ping LIN, Wei-Hung LIN, Chih-Wei LIN, Ming-Da CHENG, Ching-Hua HSIEH, Chung-Shi LIU
  • Patent number: 10867932
    Abstract: Package structures and methods for forming the same are provided. The method includes forming a redistribution structure embedded in a passivation layer over a carrier substrate and bonding an integrated circuit die to the redistribution structure through first connectors. The method further includes removing the carrier substrate to expose a bottom portion of the redistribution structure and removing the bottom portion of the redistribution structure to form an opening in the passivation layer. The method further includes forming a second connector over the redistribution structure. In addition, the second connector includes an extending portion extending into the opening in the passivation layer.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Da Tsai, Cheng-Ping Lin, Wei-Hung Lin, Chih-Wei Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Publication number: 20200152576
    Abstract: Package structures and methods for forming the same are provided. The method includes forming a redistribution structure embedded in a passivation layer over a carrier substrate and bonding an integrated circuit die to the redistribution structure through first connectors. The method further includes removing the carrier substrate to expose a bottom portion of the redistribution structure and removing the bottom portion of the redistribution structure to form an opening in the passivation layer. The method further includes forming a second connector over the redistribution structure. In addition, the second connector includes an extending portion extending into the opening in the passivation layer.
    Type: Application
    Filed: January 13, 2020
    Publication date: May 14, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Da TSAI, Cheng-Ping LIN, Wei-Hung LIN, Chih-Wei LIN, Ming-Da CHENG, Ching-Hua HSIEH, Chung-Shi LIU
  • Patent number: 10535609
    Abstract: Package structures and methods for forming the same are provided. A package structure includes a package layer. The package structure also includes an integrated circuit die and a first connector embedded in the package layer. The package structure further includes a redistribution layer over the package layer. The integrated circuit die is electrically connected to the redistribution layer through the first connector. In addition, the package structure includes a passivation layer over the redistribution layer. The package structure also includes a second connector over the passivation layer. A first portion of the redistribution layer and a second portion of the second connector extend into the passivation layer. The second portion of the second connector has a tapered profile along a direction from the integrated circuit die towards the first connector.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: January 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Da Tsai, Cheng-Ping Lin, Wei-Hung Lin, Chih-Wei Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Publication number: 20180308800
    Abstract: Package structures and methods for forming the same are provided. A package structure includes a package layer. The package structure also includes an integrated circuit die and a first connector embedded in the package layer. The package structure further includes a redistribution layer over the package layer. The integrated circuit die is electrically connected to the redistribution layer through the first connector. In addition, the package structure includes a passivation layer over the redistribution layer. The package structure also includes a second connector over the passivation layer. A first portion of the redistribution layer and a second portion of the second connector extend into the passivation layer. The second portion of the second connector has a tapered profile along a direction from the integrated circuit die towards the first connector.
    Type: Application
    Filed: June 27, 2018
    Publication date: October 25, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Da TSAI, Cheng-Ping LIN, Wei-Hung LIN, Chih-Wei LIN, Ming-Da CHENG, Ching-Hua HSIEH, Chung-Shi LIU
  • Patent number: 10014260
    Abstract: Package structures and methods for forming the same are provided. A method for forming a package structure includes providing a carrier substrate. The method also includes forming a conductive layer over the carrier substrate. The method further includes forming a passivation layer over the conductive layer. The passivation layer includes openings that expose portions of the conductive layer. In addition, the method includes bonding integrated circuit dies to the portions of the conductive layer through bumps. There is a space between the integrated circuit dies and the passivation layer. The method also includes filling the space with a first molding compound. The first molding compound surrounds the bumps and the integrated circuit dies. The method further includes forming a second molding compound capping the first molding compound and the integrated circuit dies. The passivation layer has a sidewall that is covered by the second molding compound.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: July 3, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Da Tsai, Cheng-Ping Lin, Wei-Hung Lin, Chih-Wei Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Publication number: 20180130749
    Abstract: Package structures and methods for forming the same are provided. A method for forming a package structure includes providing a carrier substrate. The method also includes forming a conductive layer over the carrier substrate. The method further includes forming a passivation layer over the conductive layer. The passivation layer includes openings that expose portions of the conductive layer. In addition, the method includes bonding integrated circuit dies to the portions of the conductive layer through bumps. There is a space between the integrated circuit dies and the passivation layer. The method also includes filling the space with a first molding compound. The first molding compound surrounds the bumps and the integrated circuit dies. The method further includes forming a second molding compound capping the first molding compound and the integrated circuit dies. The passivation layer has a sidewall that is covered by the second molding compound.
    Type: Application
    Filed: November 10, 2016
    Publication date: May 10, 2018
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Da TSAI, Cheng-Ping LIN, Wei-Hung LIN, Chih-Wei LIN, Ming-Da CHENG, Ching-Hua HSIEH, Chung-Shi LIU
  • Patent number: 7612326
    Abstract: An angle-calculation apparatus for three-phase optical encoder receives three-phase sinusoidal signals 120 degree phase from the optical encoder and obtains angle information for a motor rotor. The angle-calculation apparatus includes an A/D converter, a digital signal processor (DSP), a phase digitalizer and a digital counter. The A/D converter converts three-phase analog signals of the optical encoder into three-phase digital signals. The phase digitalizer converts the three-phase analog signals into digital phase signals. The digital counter generates a counting value based on the digital phase signals. The DSP performs an inverse trigonometric function calculation on a relatively linear region of the three-phase digital signals to obtain the angle information. The DSP obtains the rotation turn number and rotation direction of the motor rotor according to the counting value.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: November 3, 2009
    Assignee: Delta Electronics Inc.
    Inventors: Chin-Shiong Tsai, Cheng-Ping Lin, Meng-Chang Lin, Mi-Tine Tsai, Po-Ming Chen
  • Patent number: 7547875
    Abstract: A high-precision absolute type encoder apparatus includes a controller electrically connected to an incremental type encoder and generating a control signal to the incremental type encoder, a comparator electrically connected to outputs of the incremental type encoder and generating first pulse signals, a latch unit electrically connected to outputs of the comparator and generating second pulse signals by latching the generating first pulse signals. When power failure occurs, the controller generates the control signal as successive pulses with predetermined period to drive the latch unit and the incremental type encoder. Therefore, the controller knows angular information of the incremental type encoder by counting the second pulse signals. The absolute angular information can be obtained by combining the angular information and an initial position after power failure.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: June 16, 2009
    Assignee: Delta Electronics, Inc.
    Inventors: Chin-Shiong Tsai, Po-Ming Chen, Meng-Chang Lin, Cheng-Ping Lin
  • Publication number: 20090058349
    Abstract: An angle-calculation apparatus for three-phase optical encoder receives three-phase sinusoidal signals 120 degree phase from the optical encoder and obtains angle information for a motor rotor. The angle-calculation apparatus includes an A/D converter, a digital signal processor (DSP), a phase digitalizer and a digital counter. The A/D converter converts three-phase analog signals of the optical encoder into three-phase digital signals. The phase digitalizer converts the three-phase analog signals into digital phase signals. The digital counter generates a counting value based on the digital phase signals. The DSP performs an inverse trigonometric function calculation on a relatively linear region of the three-phase digital signals to obtain the angle information. The DSP obtains the rotation turn number and rotation direction of the motor rotor according to the counting value.
    Type: Application
    Filed: August 27, 2007
    Publication date: March 5, 2009
    Inventors: Chin-Shiong TSAI, Cheng-Ping Lin, Meng-Chang Lin, Mi-Tine Tsai, Po-Ming Chen