Patents by Inventor Cheng Poh

Cheng Poh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8373277
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: February 12, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Patent number: 7799610
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies are provided.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: September 21, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Patent number: 7575953
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: August 18, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Publication number: 20080136045
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
    Type: Application
    Filed: January 28, 2008
    Publication date: June 12, 2008
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Patent number: 7371608
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: May 13, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Patent number: 7358117
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: April 15, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Patent number: 7344969
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabrication are provided. In various embodiments, the die assembly comprises a first die mounted on a substrate and a second die mounted on the first die. In one embodiment, the second die has a recessed edge along the perimeter of the bottom surface to provide clearance for a bonding element extending from bond pads on the first die to pads on the substrate, thus eliminating the need for a spacer between the two dies. In another embodiment, the second die is at least partially disposed within a recess in the upper surface of the first die. In another embodiment, an adhesive element is disposed within a recess in the bottom surface of the first die for attaching the first die to the substrate. In yet another embodiment, the first die is at least partially disposed within a recess within the bottom surface of the second die. The stacked die assemblies can be encapsulated to form semiconductor packages.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: March 18, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Patent number: 7332819
    Abstract: Semiconductor devices and stacked die assemblies, are provided which have at least two semiconductor dies disposed on a substrate in a stacked arrangement, the first and second dies having first surfaces having bond pads, the second die having a second surface with a recessed edge portion along a perimeter of that die, and the recessed edge portion having a height sufficient for clearance of bonding elements extending from the first die.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: February 19, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Patent number: 7332820
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabrication are provided. In various embodiments, the die assembly comprises a first die mounted on a substrate and a second die mounted on the first die. In one embodiment, the second die has a recessed edge along the perimeter of the bottom surface to provide clearance for a bonding element extending from bond pads on the first die to pads on the substrate, thus eliminating the need for a spacer between the two dies. In another embodiment, the second die is at least partially disposed within a recess in the upper surface of the first die. In another embodiment, an adhesive element is disposed within a recess in the bottom surface of the first die for attaching the first die to the substrate. In yet another embodiment, the first die is at least partially disposed within a recess within the bottom surface of the second die. The stacked die assemblies can be encapsulated to form semiconductor packages.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: February 19, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Patent number: 7309623
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: December 18, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Patent number: 7282392
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: October 16, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Patent number: 7282390
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies are provided. In an embodiment of the methods, a second die is mounted on a first die which is at least partially received within a recess of the second die and an overall height of the dies within the device is less than a combined height of the dies.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: October 16, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Patent number: 7061124
    Abstract: A solder mask for use on a carrier substrate includes a device-securing region positionable over at least a portion of a die-support location of the carrier substrate. Dams of the solder mask are positionable laterally adjacent to at least portions of the peripheries of corresponding terminals of the carrier substrate. A carrier substrate includes at least one die-attach location and one or more terminals that protrude from a surface of the carrier substrate so as to prevent adhesive material from contaminating connection surfaces thereof. The solder may be positioned or formed on the carrier substrate. The carrier substrate and solder mask may each include one or more recessed areas that laterally surround at least portions of their die-attach location and device-securing region, respectively, to receive excess adhesive.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: June 13, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Cher Khng Victor Tan, Choon Kuan Lee, Kian Chai Lee, Guek Har Lim, Wuu Yean Tay, Teck Huat Poh, Cheng Poh Pour
  • Publication number: 20050287702
    Abstract: A method for designing a carrier substrate includes configuring at least one die-attach location and one or more terminals that protrude from a surface of the carrier substrate so as to prevent adhesive material from contaminating connection surfaces thereof. The method may also include configuring the carrier substrate to include one or more recessed areas that laterally surround at least a portion of the die-attach location to receive excess adhesive.
    Type: Application
    Filed: August 29, 2005
    Publication date: December 29, 2005
    Inventors: Cher Victor Tan, Choon Lee, Kian Lee, Guek Lim, Wuu Tay, Teck Poh, Cheng Poh
  • Publication number: 20040077109
    Abstract: A carrier substrate includes at least one die-attach location and one or more terminals that protrude from a surface of the carrier substrate so as to prevent adhesive material from contaminating connection surfaces thereof. A solder mask for use on a carrier substrate includes a device-securing region positionable over at least a portion of a die-support location of the carrier substrate. Dams of the solder mask are positionable laterally adjacent to at least portions of the peripheries of corresponding terminals of the carrier substrate. The carrier substrate and solder mask may each include one or more recessed areas that laterally surround at least portions of their die-attach location and device-securing region, respectively, to receive some of the excess adhesive. Assemblies and packages including one or both of the carrier substrate and solder mask are also disclosed, as are assembly methods and methods for designing the carrier substrate and solder mask.
    Type: Application
    Filed: August 18, 2003
    Publication date: April 22, 2004
    Inventors: Cher Khng Victor Tan, Choon Kuan Lee, Kian Chai Lee, Guek Har Lim, Wuu Yean Tay, Teck Huat Poh, Cheng Poh Pour
  • Publication number: 20030207515
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
    Type: Application
    Filed: April 28, 2003
    Publication date: November 6, 2003
    Applicant: Micron Technology, Inc., Boise, ID
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Publication number: 20030207516
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
    Type: Application
    Filed: April 28, 2003
    Publication date: November 6, 2003
    Applicant: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Publication number: 20030162325
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
    Type: Application
    Filed: March 14, 2003
    Publication date: August 28, 2003
    Applicant: Micron Technology, Inc.
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
  • Publication number: 20030148597
    Abstract: Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.
    Type: Application
    Filed: February 5, 2002
    Publication date: August 7, 2003
    Inventors: Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour