Patents by Inventor Cheng-Shang Lai

Cheng-Shang Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Silicide blocking process to form non-silicided regions on MOS devices
    Patent number: 6259140
    Abstract: A semiconductor device is formed on a substrate having an ESD region and an internal region. A protective layer is formed over a portion of the ESD region to be protected from formation of silicide and suicide is formed on portions of the Internal and ESD region which remain unprotected by the protective layer. A portion of the protective layer is removed to form the remaining portions of the protective layer into sidewall spacers adjacent to a gate electrode included in the ESD region.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: July 10, 2001
    Assignee: Macronix International Co., Ltd.
    Inventors: Meng-Hwang Liu, Cheng-Shang Lai, Tao-Cheng Lu, Mam-Tsung Wang
  • Silicide blocking process to form non-silicided regions on MOS devices
    Patent number: 6121092
    Abstract: A semiconductor device is formed on a substrate having an ESD region and an internal region. A protective layer is formed over a portion of the ESD region to be protected from formation of silicide and silicide is formed on portions of the Internal and ESD region which remain unprotected by the protective layer. A portion of the protective layer is removed to form the remaining portions of the protective layer into sidewall spacers adjacent to a gate electrode included in the ESD region.
    Type: Grant
    Filed: February 2, 1999
    Date of Patent: September 19, 2000
    Assignee: Macronix International Co., Ltd.
    Inventors: Meng-Hwang Liu, Cheng-Shang Lai, Tao-Cheng Lu, Mam-Tsung Wang