Patents by Inventor Cheng-Ta Yang

Cheng-Ta Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12183833
    Abstract: A flash memory device is provided. The flash memory device includes a substrate, a first dielectric layer, a second dielectric layer, a third dielectric layer, a first polycrystalline silicon layer and a second polycrystalline silicon layer. The first dielectric layer is formed on the substrate located in a first region of a peripheral region, the second dielectric layer is formed on the substrate located in a second region of the peripheral region, and the third dielectric layer is formed on the substrate located in an array region. A bottom surface of the third dielectric layer is lower than a bottom surface of the second dielectric layer. The first polycrystalline silicon layer is formed on the first and the second dielectric layers. The second polycrystalline silicon layer is formed on the third dielectric layer.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: December 31, 2024
    Assignee: Winbond Electronics Corp.
    Inventors: Cheng-Ta Yang, Lu-Ping Chiang
  • Publication number: 20240298440
    Abstract: A memory device includes a substrate and a plurality of word lines. The word lines are disposed on the substrate. The word lines extend in the first direction and are arranged in the second direction. The first direction intersects the second direction. The memory device further includes a first sub-select gate extending in the first direction and separated from the outermost word line in the second direction. One end of the first sub-select gate has a first width in the second direction. The major portion of the first sub-select gate has a second width in the second direction. The second width is greater than the first width.
    Type: Application
    Filed: January 11, 2024
    Publication date: September 5, 2024
    Inventors: Wen-Chieh TSAI, Cheng-Ta YANG
  • Publication number: 20240217562
    Abstract: A method for preventing a railcar from overturning, including: enabling a side of a carriage of a vehicle body to include a side wing, so that airflow generates a centripetal force due to a difference in pressure on two surfaces of an airfoil of the side wing when the vehicle body travels through a curve portion of a track, to counteract a centrifugal force on the vehicle body by the centripetal force. An anti-overturning railcar for implementing the foregoing method is also revealed.
    Type: Application
    Filed: November 27, 2023
    Publication date: July 4, 2024
    Inventor: CHENG-TA YANG
  • Publication number: 20240031754
    Abstract: A manufacturing method of a micro-electromechanical system acoustic sensor includes: forming an insulating layer and two first electrodes on a base plate, the two first electrodes being spaced apart from each other; arranging a first sacrificial layer on the insulating layer and the two first electrodes, and forming at least one first recess in the first sacrificial layer respectively above the two first electrodes; arranging a second sacrificial layer on the first sacrificial layer and the at least two first recesses, forming two second recesses spaced apart in the second sacrificial layer, and making the two second recesses respectively communicate with the corresponding at least one first recess to form two recess spaces; filling the two recess spaces respectively with a material to form two second electrodes; and removing all the first sacrificial layer and the second sacrificial layer.
    Type: Application
    Filed: June 14, 2023
    Publication date: January 25, 2024
    Inventor: CHENG-TA YANG
  • Patent number: 11876048
    Abstract: Provided is a memory device, including: a substrate; a plurality of word lines, extending in a first direction, arranged in a second direction, disposed on the substrate; a dummy structure, adjacent to ends of the word lines, disposed on the substrate, wherein the dummy structure includes a main part that extends in the second direction; and a plurality of extension parts, extending in the first direction, connected to the main part, and interposed between the main part and the word lines.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: January 16, 2024
    Assignee: Winbond Electronics Corp.
    Inventors: Wen-Chieh Tsai, Cheng-Ta Yang, Tsung-Wei Lin
  • Publication number: 20230396931
    Abstract: A micro-electromechanical system (MEMS) acoustic sensor includes: a silicon substrate layer; an insulation layer, arranged above the silicon substrate layer; two first electrode layers, respectively arranged above the insulation layer and arranged opposite to each other at intervals; and two second electrode layers, respectively arranged above the two first electrode layers. Each of the second electrode layers is provided with at least one support member connected to the corresponding first electrode layer, and forms an acoustic flow channel together with a part of the insulation layer and the two first electrode layers. The each second electrode layer has a front section and a rear section. The front section forms a diverging first cambered surface. The rear section forms a tapered second cambered surface.
    Type: Application
    Filed: December 21, 2022
    Publication date: December 7, 2023
    Inventor: CHENG-TA YANG
  • Publication number: 20230118367
    Abstract: Provided is a memory device, including: a substrate; a plurality of word lines, extending in a first direction, arranged in a second direction, disposed on the substrate; a dummy structure, adjacent to ends of the word lines, disposed on the substrate, wherein the dummy structure includes a main part that extends in the second direction; and a plurality of extension parts, extending in the first direction, connected to the main part, and interposed between the main part and the word lines.
    Type: Application
    Filed: October 19, 2021
    Publication date: April 20, 2023
    Applicant: Winbond Electronics Corp.
    Inventors: Wen-Chieh Tsai, Cheng-Ta Yang, Tsung-Wei Lin
  • Publication number: 20230022941
    Abstract: A pick-up structure for a memory device and method for manufacturing memory device are provided. The pick-up structure includes a substrate and a plurality of pick-up electrode strips. The substrate has a memory cell region and a peripheral pick-up region adjacent thereto. The pick-up electrode strips are parallel to a first direction and arranged on the substrate in a second direction. The second direction is different from the first direction. Each pick-up electrode strip includes a main part in the peripheral pick-up region and an extension part extending from the main part to the memory cell region. The main part is defined by fork-shaped patterns of a first mask layer. The extension part has a width less than that of the main part, and the extension part has a side wall surface aligned with a side wall surface of the main part.
    Type: Application
    Filed: May 23, 2022
    Publication date: January 26, 2023
    Applicant: Winbond Electronics Corp.
    Inventors: Tsung-Wei LIN, Chun-Yen LIAO, Kun-Che WU, Cheng-Ta YANG, Chun-Sheng WU
  • Publication number: 20220157993
    Abstract: A flash memory device is provided. The flash memory device includes a substrate, a first dielectric layer, a second dielectric layer, a third dielectric layer, a first polycrystalline silicon layer and a second polycrystalline silicon layer. The first dielectric layer is formed on the substrate located in a first region of a peripheral region, the second dielectric layer is formed on the substrate located in a second region of the peripheral region, and the third dielectric layer is formed on the substrate located in an array region. A bottom surface of the third dielectric layer is lower than a bottom surface of the second dielectric layer. The first polycrystalline silicon layer is formed on the first and the second dielectric layers. The second polycrystalline silicon layer is formed on the third dielectric layer.
    Type: Application
    Filed: February 4, 2022
    Publication date: May 19, 2022
    Inventors: Cheng-Ta YANG, Lu-Ping CHIANG
  • Patent number: 11335568
    Abstract: A method for forming a semiconductor structure is provided. The method includes: forming first and second hard mask layers and a target layer on a substrate; patterning the second hard mask layer to form patterned second hard masks including a second wide mask and second narrow masks; and forming spacers on sidewalls of the second wide mask and the second narrow masks. Then, a photoresist layer is formed to cover the second wide mask and the spacers on the sidewalls of the second wide mask. The second narrow masks and the photoresist layer are removed. And, the first hard mask layer is etched with the spacers and the second wide mask together as a mask to form patterned first hard masks on the target layer, wherein the spacers define a first line width, and the second wide mask and the pair of spacers define a second line width.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: May 17, 2022
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Ting-Wei Wu, Cheng-Ta Yang, Hsin-Hung Chou
  • Patent number: 11289612
    Abstract: A flash memory device and its manufacturing method are provided. The flash memory device includes a substrate, a first dielectric layer, a second dielectric layer, a third dielectric layer, a first polycrystalline silicon layer and a second polycrystalline silicon layer. The first dielectric layer is formed on the substrate located in a first region of a peripheral region, the second dielectric layer is formed on the substrate located in a second region of the peripheral region, and the third dielectric layer is formed on the substrate located in an array region. A bottom surface of the third dielectric layer is lower than a bottom surface of the second dielectric layer. The first polycrystalline silicon layer is formed on the first and the second dielectric layers. The second polycrystalline silicon layer is formed on the third dielectric layer.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: March 29, 2022
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Cheng-Ta Yang, Lu-Ping Chiang
  • Publication number: 20210358764
    Abstract: A method for forming a semiconductor structure is provided. The method includes: forming first and second hard mask layers and a target layer on a substrate; patterning the second hard mask layer to form patterned second hard masks including a second wide mask and second narrow masks; and forming spacers on sidewalls of the second wide mask and the second narrow masks. Then, a photoresist layer is formed to cover the second wide mask and the spacers on the sidewalls of the second wide mask. The second narrow masks and the photoresist layer are removed. And, the first hard mask layer is etched with the spacers and the second wide mask together as a mask to form patterned first hard masks on the target layer, wherein the spacers define a first line width, and the second wide mask and the pair of spacers define a second line width.
    Type: Application
    Filed: May 12, 2020
    Publication date: November 18, 2021
    Inventors: Ting-Wei WU, Cheng-Ta YANG, Hsin-Hung CHOU
  • Patent number: 10896911
    Abstract: A method for forming a memory device is provided. The method includes forming a floating gate on a substrate, and forming a control gate on the floating gate. The method also includes forming a mask layer on the control gate, and forming a spacer on a sidewall of the mask layer, wherein a sidewall of the control gate and a sidewall of the floating gate is covered by the spacer. The method further includes performing an ion implantation process to implant a dopant into a top portion of the spacer, and performing a wet etching process to expose the sidewall of the control gate.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: January 19, 2021
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Hsu-Chi Cho, Cheng-Ta Yang
  • Patent number: 10872535
    Abstract: An online learning management system and method for facilitating facial recognition, augmented reality, and virtual reality learning environments for users distributed across a network is disclosed. The system includes a server and one or more clients coupled by a network, each of the one or more clients having a learning environment. In some embodiments, the server receives and detects a network status of each client and dynamically adjusts a synchronization frequency of each associated learning environment. The learning environment may be an augmented reality learning environment having one or more face masks and/or stickers applied to facial features of a user in a video signal, wherein the server synchronizes the augmented reality learning environment among each client. The learning environment may further be a virtual reality learning environment having one or more 3D objects in a 3D scene, wherein the server synchronizes the virtual reality learning environments.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: December 22, 2020
    Assignee: Tutor Group Limited
    Inventor: Cheng-Ta Yang
  • Publication number: 20200357302
    Abstract: A method for remote digital learning includes: providing plural teaching videos that each correspond to one of plural teachers and one of plural teaching materials; selecting a designated teacher from among the plural teachers based on student tags related to a user and teacher tags related to the plural teachers; selecting a designated teaching material from among the plural teaching materials based on the student tags and teaching material tags related to the plural teaching materials; from among the plural teaching videos, selecting a designated video that corresponds to both of the designated teacher and the designated teaching material; and providing the designated video to the user.
    Type: Application
    Filed: May 8, 2020
    Publication date: November 12, 2020
    Inventor: Cheng-Ta YANG
  • Publication number: 20200303556
    Abstract: A flash memory device and its manufacturing method are provided. The flash memory device includes a substrate, a first dielectric layer, a second dielectric layer, a third dielectric layer, a first polycrystalline silicon layer and a second polycrystalline silicon layer. The first dielectric layer is formed on the substrate located in a first region of a peripheral region, the second dielectric layer is formed on the substrate located in a second region of the peripheral region, and the third dielectric layer is formed on the substrate located in an array region. A bottom surface of the third dielectric layer is lower than a bottom surface of the second dielectric layer. The first polycrystalline silicon layer is formed on the first and the second dielectric layers. The second polycrystalline silicon layer is formed on the third dielectric layer.
    Type: Application
    Filed: March 19, 2020
    Publication date: September 24, 2020
    Inventors: Cheng-Ta YANG, Lu-Ping CHIANG
  • Patent number: 10755592
    Abstract: An online learning management system for monitoring and maintaining operational integrity of online teaching groups having users distributed across a network is disclosed. The system includes a managing interface, a teaching module, an analyzing module, a managing module, and a monitoring module. The teaching module is configured to manage communications between computing devices of the users. The analyzing module is configured to detect operational problems and disturbances. The managing module is configured to receive messages from the analyzing module, remove a user experiencing the operational problem or disturbance, insert the user into a managing area, facilitate diagnosis and correction of the operational problem or disturbance, and return the user when the operational problem or disturbance has been corrected. The monitoring module is configured to monitor connection status data of the computing devices, determine if the connection status is unstable, and record the connection status data of the user.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: August 25, 2020
    Assignee: TUTOR GROUP LIMITED
    Inventor: Cheng-Ta Yang
  • Patent number: 10586296
    Abstract: An online learning management system for monitoring and maintaining the operational integrity of online teaching groups consisting of users distributed across a network is disclosed. The system comprises a management interface coupled to a teaching group and a teaching module configured to identify user operational problems within the group and to remove a user when an operational problem is identified. The system further comprises a managing module that inserts the user into a managing area when the user is removed from the teaching group, facilitates diagnosis and correction of the operational problem, and returns the user to the group when the operational problem has been corrected. The system further comprises a personalized operation interface that disables the user's connection to the group in response to the removal of the user from the group, and restores the user's connection when the operational problem has been corrected.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: March 10, 2020
    Assignee: Tutor Group Limited
    Inventor: Cheng-Ta Yang
  • Publication number: 20190348426
    Abstract: A method for forming a memory device is provided. The method includes forming a floating gate on a substrate, and forming a control gate on the floating gate. The method also includes forming a mask layer on the control gate, and forming a spacer on a sidewall of the mask layer, wherein a sidewall of the control gate and a sidewall of the floating gate is covered by the spacer. The method further includes performing an ion implantation process to implant a dopant into a top portion of the spacer, and performing a wet etching process to expose the sidewall of the control gate.
    Type: Application
    Filed: April 3, 2019
    Publication date: November 14, 2019
    Inventors: Hsu-Chi CHO, Cheng-Ta YANG
  • Patent number: 10460648
    Abstract: A method for controlling a display panel includes steps of: providing a display panel, where the display panel includes a plurality of pixels arranged into a plurality of columns and rows and a plurality of data lines, where one of the data lines is coupled to pixels arranged in odd number rows of one of two columns which are adjacent to the one of the data lines, and coupled to pixels arranged in even number rows of the other one of two columns which are adjacent to the one of the data lines; receiving the data signals in a driving manner of column inversion by the data lines during a display period; and receiving the data signals in a driving manner of N-dot inversion by the data lines during a blanking period.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: October 29, 2019
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Pei-Chun Liao, Cheng-Ta Yang