Patents by Inventor Cheng-Tai Huang

Cheng-Tai Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10671108
    Abstract: A bandgap reference circuit and method of using the same are provided. The bandgap reference circuit includes a startup component; an output component; and a bandgap core component coupled there-between. The bandgap core component includes a reference point having a voltage associated with an output signal of the output component. A controller is configured for controlling the bandgap core component and the output component to switch between a low power consumption mode and a normal operation mode based on the voltage at the reference point. When the bandgap core component and the output component operate in the normal operation mode, the bandgap reference circuit outputs a stable voltage and has a first power consumption. When the bandgap core component and the output component operate in the low power consumption mode, the bandgap reference circuit has a second power consumption less than the first power consumption.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: June 2, 2020
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Josh Yang, Zhi Bing Deng, Cheng Tai Huang, Cheng Yi Huang, Wen Jun Weng, Jun Tao Guo
  • Patent number: 10607662
    Abstract: A Static Random Access Memory (SRAM) array power supply circuit is presented. The circuit comprises an SRAM test unit having a substantially same structure as a basic SRAM unit in the SRAM array; a switch device connected to a power source, the SRAM test unit, and the SRAM array; and a switch control circuit connected to the SRAM test unit and the switch device. When a test voltage in the SRAM test unit is lower than a threshold voltage, the switch device is closed so that the power source begins to charge the SRAM array and the SRAM test unit. The SRAM test unit provides an early warning for the SRAM array, allowing the latter to be charged upon fulfillment of a condition (e.g., charge is low). Compared to conventional circuits, this circuit provides an output voltage that is more stable and less susceptible to the changes in external conditions such as temperature or pressure.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: March 31, 2020
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Chen-Yi Huang, Chia Chi Yang, Dong Xiang Luo, Cheng-Tai Huang
  • Patent number: 10527667
    Abstract: Method and device for detecting the process corner of a transistor are provided. The process corner detection method includes providing a ring oscillator. The ring oscillator includes an odd number of oscillation units connected in series and an output port of one of the oscillation units serves as the output port of the ring oscillator to output an oscillation signal. Each oscillation unit is constructed based on a PMOS transistor and an NMOS transistor. The process corner detection method further includes measuring the period of the oscillation signal and the maintaining time of the oscillation signal at a high level and a low level in each cycle; and determining the process corner of the PMOS transistor and the NMOS transistor in the oscillation unit based on the period of the oscillation signal and the maintaining time of the oscillation signal at a high level and a low level in each cycle.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: January 7, 2020
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Cheng-Tai Huang, Chia Chi Yang, Chen-Yi Huang
  • Patent number: 10522196
    Abstract: A method operates a bandgap voltage reference circuit that includes a bias circuit for receiving a feedback signal and outputting a bias signal, an amplifier for receiving the bias signal and outputting a first reference signal as the feedback signal, an output circuit for receiving the first reference signal and outputting a second reference signal, and an output switch for outputting the second reference signal as an output signal. The method includes, after powering up the bandgap voltage reference circuit, determining whether the output signal is stable, when the output signal is stable, turning off the output switch; turning off the bias circuit; and turning off the output circuit. The sequential turning off the output switch, the output circuit, and the bias circuit puts the bandgap voltage reference circuit into a sleep mode to save power.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: December 31, 2019
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Chia Chi Yang, Zhi Bing Deng, Cheng-Tai Huang
  • Patent number: 10386881
    Abstract: A power supply circuit, its generating and control methods are presented, relating to smart wearable devices. The power supply circuit comprises a Bandgap voltage reference, a real-time detection and control circuit, and a substitute voltage source. The real-time detection and control circuit is connected to the Bandgap voltage reference and the substitute voltage source, and adjusts an output voltage of the substitute voltage source to match an output voltage of the Bandgap voltage reference. After these output voltages are equal, the output voltage of the power supply circuit is provided by the substitute voltage source, and the Bandgap voltage reference can be disconnected from the circuit. This circuit can lower the power consumption of the Bandgap voltage reference without affecting the stability of the voltage output.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: August 20, 2019
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Chia Chi Yang, Chen Yi Huang, Zhi Bing Deng, Cheng Tai Huang, Wen Jun Weng
  • Publication number: 20190035435
    Abstract: A Static Random Access Memory (SRAM) array power supply circuit is presented. The circuit comprises an SRAM test unit having a substantially same structure as a basic SRAM unit in the SRAM array; a switch device connected to a power source, the SRAM test unit, and the SRAM array; and a switch control circuit connected to the SRAM test unit and the switch device. When a test voltage in the SRAM test unit is lower than a threshold voltage, the switch device is closed so that the power source begins to charge the SRAM array and the SRAM test unit. The SRAM test unit provides an early warning for the SRAM array, allowing the latter to be charged upon fulfillment of a condition (e.g., charge is low). Compared to conventional circuits, this circuit provides an output voltage that is more stable and less susceptible to the changes in external conditions such as temperature or pressure.
    Type: Application
    Filed: July 27, 2018
    Publication date: January 31, 2019
    Inventors: Chen-Yi HUANG, Chia Chi YANG, Dong Xiang LUO, Cheng-Tai HUANG
  • Publication number: 20190004557
    Abstract: A power supply circuit, its generating and control methods are presented, relating to smart wearable devices. The power supply circuit comprises a Bandgap voltage reference, a real-time detection and control circuit, and a substitute voltage source. The real-time detection and control circuit is connected to the Bandgap voltage reference and the substitute voltage source, and adjusts an output voltage of the substitute voltage source to match an output voltage of the Bandgap voltage reference. After these output voltages are equal, the output voltage of the power supply circuit is provided by the substitute voltage source, and the Bandgap voltage reference can be disconnected from the circuit. This circuit can lower the power consumption of the Bandgap voltage reference without affecting the stability of the voltage output.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 3, 2019
    Inventors: Chia Chi YANG, Chen Yi HUANG, Zhi Bing DENG, Cheng Tai HUANG, Wen Jun WENG
  • Publication number: 20180246160
    Abstract: Method and device for detecting the process corner of a transistor are provided. The process corner detection method includes providing a ring oscillator. The ring oscillator includes an odd number of oscillation units connected in series and an output port of one of the oscillation units serves as the output port of the ring oscillator to output an oscillation signal. Each oscillation unit is constructed based on a PMOS transistor and an NMOS transistor. The process corner detection method further includes measuring the period of the oscillation signal and the maintaining time of the oscillation signal at a high level and a low level in each cycle; and determining the process corner of the PMOS transistor and the NMOS transistor in the oscillation unit based on the period of the oscillation signal and the maintaining time of the oscillation signal at a high level and a low level in each cycle.
    Type: Application
    Filed: February 20, 2018
    Publication date: August 30, 2018
    Inventors: Cheng-Tai HUANG, Chia Chi YANG, Chen-Yi HUANG
  • Patent number: 9991002
    Abstract: The present disclosure provides a memory. The memory includes an array of memory cells arranged as a plurality of rows by a plurality of columns. A memory cell is connected to at least one redundant memory cell in series in a same row for storing same data as the memory cell; and a column of memory cells correspond to at least one redundant column of redundant memory cells wherein each redundant memory cell in the at least one redundant column stores same data as the memory cell in a same row.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: June 5, 2018
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Chen-Yi Huang, Jiaqi Yang, Cheng-Tai Huang
  • Patent number: 9991003
    Abstract: The present disclosure provides a memory. The memory includes an array of memory cells arranged as a plurality of rows by a plurality of columns. A memory cell is connected to at least one redundant memory cell in series in a same row for storing same data as the memory cell; and a column of memory cells correspond to at least one redundant column of redundant memory cells wherein each redundant memory cell in the at least one redundant column stores same data as the memory cell in a same row.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: June 5, 2018
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Chen-Yi Huang, Jiaqi Yang, Cheng-Tai Huang
  • Patent number: 9983752
    Abstract: A pressure detection method for an in-cell touch display and a mobile device using the same are provided. The pressure detection method comprises the steps of: providing a common voltage plane corresponding to touch sensing electrodes in the in-cell touch display; detecting capacitance values of the touch sensing electrodes; setting a first area and a second area according to a center of a touched portion when the in-cell touch display is determined as being touched, wherein the second area includes the first area; and excluding the capacitance values of the touch sensing electrodes in the first area, and using the capacitance values of the touch sensing electrodes in the second area to serve as a pressure detection value to determine a pressure exerted on the in-cell touch display.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: May 29, 2018
    Assignee: FOCALTECH ELECTRONICS, LTD.
    Inventors: Po-Sheng Shih, Chien-Yung Cheng, Cheng-Tai Huang
  • Publication number: 20180129237
    Abstract: A bandgap reference circuit and method of using the same are provided. The bandgap reference circuit includes a startup component; an output component; and a bandgap core component coupled there-between. The bandgap core component includes a reference point having a voltage associated with an output signal of the output component. A controller is configured for controlling the bandgap core component and the output component to switch between a low power consumption mode and a normal operation mode based on the voltage at the reference point. When the bandgap core component and the output component operate in the normal operation mode, the bandgap reference circuit outputs a stable voltage and has a first power consumption. When the bandgap core component and the output component operate in the low power consumption mode, the bandgap reference circuit has a second power consumption less than the first power consumption.
    Type: Application
    Filed: November 3, 2017
    Publication date: May 10, 2018
    Inventors: Josh YANG, Zhi Bing DENG, Cheng Tai HUANG, Cheng Yi HUANG, Wen Jun WENG, Jun Tao GUO
  • Publication number: 20180096712
    Abstract: A method operates a bandgap voltage reference circuit that includes a bias circuit for receiving a feedback signal and outputting a bias signal, an amplifier for receiving the bias signal and outputting a first reference signal as the feedback signal, an output circuit for receiving the first reference signal and outputting a second reference signal, and an output switch for outputting the second reference signal as an output signal. The method includes, after powering up the bandgap voltage reference circuit, determining whether the output signal is stable, when the output signal is stable, turning off the output switch; turning off the bias circuit; and turning off the output circuit. The sequential turning off the output switch, the output circuit, and the bias circuit puts the bandgap voltage reference circuit into a sleep mode to save power.
    Type: Application
    Filed: September 25, 2017
    Publication date: April 5, 2018
    Inventors: CHIA CHI YANG, ZHI BING DENG, CHENG-TAI HUANG
  • Publication number: 20170221576
    Abstract: The present disclosure provides a memory. The memory includes an array of memory cells arranged as a plurality of rows by a plurality of columns. A memory cell is connected to at least one redundant memory cell in series in a same row for storing same data as the memory cell; and a column of memory cells correspond to at least one redundant column of redundant memory cells wherein each redundant memory cell in the at least one redundant column stores same data as the memory cell in a same row.
    Type: Application
    Filed: April 20, 2017
    Publication date: August 3, 2017
    Inventors: Chen-Yi HUANG, Jiaqi YANG, Cheng-Tai HUANG
  • Publication number: 20170221575
    Abstract: The present disclosure provides a memory. The memory includes an array of memory cells arranged as a plurality of rows by a plurality of columns. A memory cell is connected to at least one redundant memory cell in series in a same row for storing same data as the memory cell; and a column of memory cells correspond to at least one redundant column of redundant memory cells wherein each redundant memory cell in the at least one redundant column stores same data as the memory cell in a same row.
    Type: Application
    Filed: April 20, 2017
    Publication date: August 3, 2017
    Inventors: Chen-Yi HUANG, Jiaqi YANG, Cheng-Tai HUANG
  • Publication number: 20170177141
    Abstract: A pressure detection method for an in-cell touch display and a mobile device using the same are provided. The pressure detection method comprises the steps of: providing a common voltage plane corresponding to touch sensing electrodes in the in-cell touch display; detecting capacitance values of the touch sensing electrodes; setting a first area and a second area according to a center of a touched portion when the in-cell touch display is determined as being touched, wherein the second area includes the first area; and excluding the capacitance values of the touch sensing electrodes in the first area, and using the capacitance values of the touch sensing electrodes in the second area to serve as a pressure detection value to determine a pressure exerted on the in-cell touch display.
    Type: Application
    Filed: September 27, 2016
    Publication date: June 22, 2017
    Inventors: Po-Sheng SHIH, CHIEN-YUNG CHENG, Cheng-Tai HUANG
  • Patent number: 9659672
    Abstract: The present disclosure provides a memory. The memory includes an array of memory cells arranged as a plurality of rows by a plurality of columns. A memory cell is connected to at least one redundant memory cell in series in a same row for storing same data as the memory cell; and a column of memory cells correspond to at least one redundant column of redundant memory cells wherein each redundant memory cell in the at least one redundant column stores same data as the memory cell in a same row.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: May 23, 2017
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Chen-Yi Huang, Jiaqi Yang, Cheng-Tai Huang
  • Patent number: 9620239
    Abstract: A method for operating a memory is provided. The memory has an array of memory cells arranged in a plurality of rows and columns. Each row includes a label storage unit. The method includes receiving a first to-be-programmed data set to be stored into a target row and determining whether a condition is satisfied. When the condition is satisfied, performing a first operation on the first to-be-programmed data set to obtain a second to-be-programmed data set, programming the second to-be-programmed data set into the target row of memory cells, and setting the value of the label storage, unit to be a first labeling value. When the condition is not satisfied, performing a second operation on the first to-be-programmed data set to program the first to-be-programmed data set into the target row of memory cells, and setting the value of the label storage unit to be a second labeling value.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: April 11, 2017
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Cheng-Tai Huang, Chia-Chi Yang, Chen-Yi Huang
  • Patent number: 9569051
    Abstract: A method for determining touch point coordinates on capacitive type touch panel includes following steps. A touch panel having a conductive layer, a plurality of first electrodes, and a plurality of second electrodes is provided. A first signal curve As1 is obtained by driving and sensing each first electrode. A second signal curve As2 is obtained by driving and sensing each second electrode. A third signal curve Bs1 is obtained by driving and sensing each first electrode, wherein the second electrode opposite to the sensed first electrode is grounded. A fourth signal curve Bs2 is gotten by driving and sensing each second electrodes, wherein the first electrode opposite to the sensed second electrode is grounded. The coordinates of the touch points are obtained by comparing the first signal curve As1, the second signal curve As2, the third signal curve Bs1, and the fourth signal curve Bs2.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: February 14, 2017
    Assignee: TIANJIN FUNAYUANCHUANG TECHNOLOGY CO., LTD.
    Inventors: Chien-Yung Cheng, Cheng-Tai Huang, Chun-Lung Huang, Feng-Yu Kuo, Po-Sheng Shih
  • Patent number: 9418763
    Abstract: The present invention provides a memory. The memory includes a plurality of memory cells arranged as an array with a plurality of rows and a plurality of column. A memory cell is connected to at least one redundant memory cell in a same row for storing same data as the memory cell; and a column of memory cells correspond to one redundant column of redundant memory cells wherein each redundant memory cell in the redundant column stores same data as the memory cell in a same row.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: August 16, 2016
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Cheng-Tai Huang, Jiaqi Yang, Chen-Yi Huang