Patents by Inventor Cheng-Tao Chou
Cheng-Tao Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240321626Abstract: A semiconductor structure includes a ceramic substrate, a first bonding layer, a second bonding layer, a cavity, and a semiconductor layer. The ceramic substrate includes holes on its surface. The first bonding layer is disposed on the surface of the ceramic substrate, and the second bonding layer is bonded to the first bonding layer. The cavity is disposed above the hole and enclosed by the first bonding layer and the second bonding layer. The semiconductor layer extends over the cavity and is disposed along the surface of the second bonding layer.Type: ApplicationFiled: May 29, 2024Publication date: September 26, 2024Applicant: Vanguard International Semiconductor CorporationInventors: Yang Du, Yung-Fong Lin, Tsung-Hsiang Lin, Yu-Chieh Chou, Cheng-Tao Chou, Yi-Chun Lu, Chun-Hsu Chen
-
Patent number: 12027413Abstract: A semiconductor structure includes a ceramic substrate, a first bonding layer, a second bonding layer, a cavity, and a semiconductor layer. The ceramic substrate includes holes on its surface. The first bonding layer is disposed on the surface of the ceramic substrate, and the second bonding layer is bonded to the first bonding layer. The cavity is disposed above the hole and enclosed by the first bonding layer and the second bonding layer. The semiconductor layer extends over the cavity and is disposed along the surface of the second bonding layer.Type: GrantFiled: August 22, 2021Date of Patent: July 2, 2024Assignee: Vanguard International Semiconductor CorporationInventors: Yang Du, Yung-Fong Lin, Tsung-Hsiang Lin, Yu-Chieh Chou, Cheng-Tao Chou, Yi-Chun Lu, Chun-Hsu Chen
-
Patent number: 11955397Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.Type: GrantFiled: November 9, 2020Date of Patent: April 9, 2024Assignee: Vanguard International Semiconductor CorporationInventors: Shin-Cheng Lin, Cheng-Wei Chou, Ting-En Hsieh, Yi-Han Huang, Kwang-Ming Lin, Yung-Fong Lin, Cheng-Tao Chou, Chi-Fu Lee, Chia-Lin Chen, Shu-Wen Chang
-
Publication number: 20230058295Abstract: A semiconductor structure includes a ceramic substrate, a first bonding layer, a second bonding layer, a cavity, and a semiconductor layer. The ceramic substrate includes holes on its surface. The first bonding layer is disposed on the surface of the ceramic substrate, and the second bonding layer is bonded to the first bonding layer. The cavity is disposed above the hole and enclosed by the first bonding layer and the second bonding layer. The semiconductor layer extends over the cavity and is disposed along the surface of the second bonding layer.Type: ApplicationFiled: August 22, 2021Publication date: February 23, 2023Applicant: Vanguard International Semiconductor CorporationInventors: Yang Du, Yung-Fong Lin, Tsung-Hsiang Lin, Yu-Chieh Chou, Cheng-Tao Chou, Yi-Chun Lu, Chun-Hsu Chen
-
Patent number: 11552171Abstract: A substrate structure and a method for fabricating a semiconductor structure including the substrate structure are provided. The substrate structure includes a substrate, a bow adjustment layer, and a silicon layer. The bow adjustment layer is on the top surface of the substrate. The silicon layer is on the bow adjustment layer. The substrate structure has a total bow value, and the total vow value is from ?20 ?m to ?40 ?m.Type: GrantFiled: October 14, 2021Date of Patent: January 10, 2023Assignee: Vanguard International Semiconductor CorporationInventors: Yung-Fong Lin, Cheng-Tao Chou
-
Publication number: 20220148938Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.Type: ApplicationFiled: November 9, 2020Publication date: May 12, 2022Applicant: Vanguard International Semiconductor CorporationInventors: Shin-Cheng LIN, Cheng-Wei CHOU, Ting-En HSIEH, Yi-Han HUANG, Kwang-Ming LIN, Yung-Fong LIN, Cheng-Tao CHOU, Chi-Fu LEE, Chia-Lin CHEN, Shu-Wen CHANG
-
Publication number: 20220069085Abstract: A substrate structure and a method for fabricating a semiconductor structure including the substrate structure are provided. The substrate structure includes a substrate, a bow adjustment layer, and a silicon layer. The bow adjustment layer is on the top surface of the substrate. The silicon layer is on the bow adjustment layer. The substrate structure has a total bow value, and the total vow value is from ?20 ?m to ?40 ?m.Type: ApplicationFiled: October 14, 2021Publication date: March 3, 2022Applicant: Vanguard International Semiconductor CorporationInventors: Yung-Fong LIN, Cheng-Tao CHOU
-
Patent number: 11211331Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a substrate and a seed layer on the substrate. The substrate includes a base and a composite layer encapsulating the base. The semiconductor structure also includes an epitaxial layer on the seed layer. The semiconductor structure also includes a semiconductor device on the epitaxial layer, and an interlayer dielectric layer on the epitaxial layer. The interlayer dielectric layer covers the semiconductor device. The semiconductor structure further includes a via structure that penetrates at least the composite layer of the substrate and is in contact with the base.Type: GrantFiled: January 22, 2020Date of Patent: December 28, 2021Assignee: Vanguard International Semiconductor CorporationInventors: Yung-Fong Lin, Li-Wen Chuang, Jui-Hung Yu, Cheng-Tao Chou, Chun-Hsu Chen, Yu-Chieh Chou
-
Patent number: 11183563Abstract: A substrate structure and a method for fabricating a semiconductor structure including the substrate structure are provided. The substrate structure includes a substrate, a bow adjustment layer, and a silicon layer. The bow adjustment layer is on the top surface of the substrate. The silicon layer is on the bow adjustment layer. The substrate structure has a total bow value, and the total vow value is from ?20 ?m to ?40 ?m.Type: GrantFiled: October 4, 2019Date of Patent: November 23, 2021Assignee: Vanguard International Semiconductor CorporationInventors: Yung-Fong Lin, Cheng-Tao Chou
-
Publication number: 20210225770Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a substrate and a seed layer on the substrate. The substrate includes a base and a composite layer encapsulating the base. The semiconductor structure also includes an epitaxial layer on the seed layer. The semiconductor structure also includes a semiconductor device on the epitaxial layer, and an interlayer dielectric layer on the epitaxial layer. The interlayer dielectric layer covers the semiconductor device. The semiconductor structure further includes a via structure that penetrates at least the composite layer of the substrate and is in contact with the base.Type: ApplicationFiled: January 22, 2020Publication date: July 22, 2021Applicant: Vanguard International Semiconductor CorporationInventors: Yung-Fong LIN, Li-Wen CHUANG, Jui-Hung YU, Cheng-Tao CHOU, Chun-Hsu CHEN, Yu-Chieh CHOU
-
Publication number: 20210104604Abstract: A substrate structure and a method for fabricating a semiconductor structure including the substrate structure are provided. The substrate structure includes a substrate, a bow adjustment layer, and a silicon layer. The bow adjustment layer is on the top surface of the substrate. The silicon layer is on the bow adjustment layer. The substrate structure has a total bow value, and the total vow value is from ?20 ?m to ?40 ?m.Type: ApplicationFiled: October 4, 2019Publication date: April 8, 2021Applicant: Vanguard International Semiconductor CorporationInventors: Yung-Fong LIN, Cheng-Tao CHOU
-
Patent number: 10790143Abstract: A semiconductor structure, a high electron mobility transistor (HEMT), and a method for fabricating a semiconductor structure are provided. The semiconductor structure includes a substrate, a flowable dielectric material pad layer, a reflow protection layer, and a GaN-based semiconductor layer. The substrate has a pit exposed from a top surface of the substrate. The flowable dielectric material pad layer is formed in the pit, and a top surface of the flowable dielectric material pad layer is below the top surface of the substrate. The reflow protection layer is formed on the substrate and the top surface of the flowable dielectric material pad layer. The GaN-based semiconductor layer is disposed over the substrate.Type: GrantFiled: July 3, 2019Date of Patent: September 29, 2020Assignee: Vanguard International Semiconductor CorporationInventors: Yung-Fong Lin, Cheng-Tao Chou
-
Patent number: 10453947Abstract: A semiconductor device includes a substrate, a flowable dielectric material and a GaN-based semiconductor layer. The substrate has a pit exposed from an upper surface of the substrate, the flowable dielectric material fully fills the pit, and the GaN-based semiconductor layer is disposed over the substrate and the flowable dielectric material.Type: GrantFiled: June 12, 2018Date of Patent: October 22, 2019Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Yung-Fung Lin, Cheng-Wei Chou, Szu-Yao Chang, Cheng-Tao Chou, Hsiu-Ming Chen