Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, and a conductive filler. The polymer matrix has a fluoropolymer. The total volume of the PTC material layer is calculated as 100%, and the fluoropolymer accounts for 47-62% by volume of the PTC material layer. The fluoropolymer has a melt viscosity higher than 3000 Pa·s.

Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a polymer matrix and a first conductive filler. The polymer matrix includes a polyolefin-based polymer and a fluoropolymer. The fluoropolymer has a melt flow index higher than 1.9 g/10 min, and the polyolefin-based polymer and the fluoropolymer together form an interpenetrating polymer network (IPN). The first conductive filler has a metal-ceramic compound dispersed in the polymer matrix.

Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 48% to 55%. The conductive filler has a metal-ceramic compound.

Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 33% to 42%.

Abstract: A backlight module comprises an outer frame unit, a light guide plate arranged in the outer frame unit, a light-emitting unit, a plurality of adhesives for fixing the light-emitting unit on the light guide plate, and a plurality of abutting structures. The light-emitting unit includes a flexible circuit board and a plurality of light-emitting elements arranged on the flexible circuit board at intervals. Part of the flexible circuit board is deformed at a specific position by the abutting structures, and the position of the light-emitting elements relative to the light guide plate can be adjusted. Thereby, the light-emitting elements can be aligned with the light incident surface of the light guide plate, prevent light from leaking from the light emitting surface of the light guide plate close to the light-emitting elements, and reduce the generation of bright lines and improving the overall uniformity. The present invention also provides a display device including the backlight module.

Abstract: A backlight module comprises a back plate, a reflective sheet arranged on the back plate and forming a plurality of openings, a plurality of light-emitting elements located in the plurality of openings, at least one optical element arranged on the reflective sheet, and at least a supporting element configured between the back plate and the reflective sheet. The supporting element can move along with the reflective sheet. The supporting element has a base portion and a supporting portion extending from the base portion towards the optical element. The base portion of the supporting element is located between the back plate and the reflective sheet. The supporting portion of the supporting element passes through the reflective sheet to support the optical element. The supporting element is not a fixed design and can move along with the reflective sheet.

Abstract: A backlight module comprises a back plate, a reflective sheet arranged on the back plate and forming a plurality of openings, a plurality of light-emitting elements located in the plurality of openings, at least one optical element arranged on the reflective sheet, and at least a supporting element configured between the back plate and the reflective sheet. The supporting element can move along with the reflective sheet. The supporting element has a base portion and a supporting portion extending from the base portion towards the optical element. The base portion of the supporting element is located between the back plate and the reflective sheet. The supporting portion of the supporting element passes through the reflective sheet to support the optical element. The supporting element is not a fixed design and can move along with the reflective sheet.

Abstract: A frame assembly has a front side, a back side, at least one first assembly and a second assembly. The first assembly has multiple assembling portions disposed at spaced intervals. The second assembly has multiple engaging portions disposed at spaced intervals, and each one of the multiple engaging portions has two engaging surfaces disposed at a spaced interval, a bottom surface connected with the two engaging surfaces, and an opening opposed to the bottom surface and located on an outer edge of the second assembly. A width between the two engaging surfaces near the opening is smaller than a width near the bottom surface. Locations of the multiple engaging portions correspond to locations of the assembling portions, and multiple assembling portions and the multiple engaging portions are capable of being engaged together. A backlight module and a display device are also provided.

Abstract: A method comprises identifying a semiconductor device layout region comprising a first n-type metal oxide semiconductor (MOS) device having a first pair of face-to-face diodes adjacent to a second n-type MOS device having a second pair of face-to-face diodes and adding a dummy device between a first body contact of the first n-type MOS device and a second body contact of the second MOS device.

Abstract: A frame device includes a first frame, a plurality of fasteners and an second frame. The first frame includes a base wall and a side wall extending transversely from one end of the base wall. The fasteners are disposed on the side wall opposite to the base wall. The second frame is assembled to and covers an upper end of the first frame and has a plurality of spaced-apart positioning holes. A portion of each fastener passes out of a respective positioning hole and presses against the second frame when the second frame is assembled to the first frame.

Abstract: A method comprises identifying a semiconductor device layout region comprising a first n-type metal oxide semiconductor (MOS) device having a first pair of face-to-face diodes adjacent to a second n-type MOS device having a second pair of face-to-face diodes and adding a dummy device between a first body contact of the first n-type MOS device and a second body contact of the second MOS device.

Abstract: A frame device includes a first frame, a plurality of fasteners and an second frame. The first frame includes a base wall and a side wall extending transversely from one end of the base wall. The fasteners are disposed on the side wall opposite to the base wall. The second frame is assembled to and covers an upper end of the first frame and has a plurality of spaced-apart positioning holes. A portion of each fastener passes out of a respective positioning hole and presses against the second frame when the second frame is assembled to the first frame.

Abstract: A method comprises identifying a semiconductor device layout region comprising a first n-type metal oxide semiconductor (MOS) device having a first pair of face-to-face diodes adjacent to a second n-type MOS device having a second pair of face-to-face diodes and adding a dummy device between a first body contact of the first n-type MOS device and a second body contact of the second MOS device.

Abstract: A method comprises identifying a semiconductor device layout region comprising a first n-type metal oxide semiconductor (MOS) device having a first pair of face-to-face diodes adjacent to a second n-type MOS device having a second pair of face-to-face diodes and adding a dummy device between a first body contact of the first n-type MOS device and a second body contact of the second MOS device.

Abstract: An apparatus comprises two n-type metal oxide semiconductor (MOS) devices formed next to each other. Each n-type MOS device further includes a pair of face-to-face diodes formed in an isolation ring. A method of modeling the apparatus comprises reusing four-terminal MOS device models in standard cell libraries and combining the four-terminal MOS device model and the isolation ring model into a 4T MOS plus isolation ring model. The method of modeling the apparatus further comprises adding a dummy device between a body contact of the first n-type MOS device and a body contact of the second n-type MOS device.

Abstract: An apparatus comprises two n-type metal oxide semiconductor (MOS) devices formed next to each other. Each n-type MOS device further includes a pair of face-to-face diodes formed in an isolation ring. A method of modeling the apparatus comprises reusing four-terminal MOS device models in standard cell libraries and combining the four-terminal MOS device model and the isolation ring model into a 4T MOS plus isolation ring model. The method of modeling the apparatus further comprises adding a dummy device between a body contact of the first n-type MOS device and a body contact of the second n-type MOS device.