Patents by Inventor Cheng-Ting Liu

Cheng-Ting Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11939268
    Abstract: A method of forming low-k material is provided. The method includes providing a plurality of core-shell particles. The core of the core-shell particles has a first ceramic with a low melting point. The shell of the core-shell particles has a second ceramic with a low melting point and a low dielectric constant. The core-shell particles are sintered and molded to form a low-k material. The shell of the core-shell particles is connected to form a network structure of a microcrystal phase.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kuo-Chuang Chiu, Tzu-Yu Liu, Tien-Heng Huang, Tzu-Chi Chou, Cheng-Ting Lin
  • Publication number: 20240096998
    Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shuen-Shin LIANG, Chij-chien CHI, Yi-Ying LIU, Chia-Hung CHU, Hsu-Kai CHANG, Cheng-Wei CHANG, Chein-Shun LIAO, Keng-chu LIN, KAi-Ting HUANG
  • Patent number: 11928456
    Abstract: The present disclosure provides a software upgrade system, which is applicable to at least one autonomous mobile robot installed with software in a data distribution service domain. The at least one autonomous mobile robot publishes a version information about the software to the version synchronization topic and receives other version information from the version synchronization topic. Also, the at least one autonomous mobile robot subscribes to a version synchronization topic, and takes the software of the at least one autonomous mobile robot itself as the latest version by a software update procedure to upload to a software update topic, or downloads the latest version of the software from the software update topic and installs it. The present disclosure provides a software upgrade method and a non-transitory recording medium.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: March 12, 2024
    Assignee: ADLINK TECHNOLOGY INC.
    Inventors: Chen-Ying Kuo, Cheng-Ting Chang, Yi-Chen Liu
  • Patent number: 11916077
    Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Liang Chen, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Ru-Gun Liu, Wei-Cheng Lin, Lei-Chun Chou, Wei-An Lai
  • Patent number: 7010704
    Abstract: An apparatus for dynamically adjusting power consumption of a CPU in a computer system is described. A current flowing through the limiting resistor is detected and whether or not this current is larger than a predetermined current is determined. A warning signal is issued when the current is larger than this predetermined signal. The warning signal triggers the software framework and the hardware framework of the apparatus to issue an asynchronous operation frequency reduction instruction to the CPU of the computer system.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: March 7, 2006
    Assignee: Quanta Computer Inc.
    Inventors: Yu-Jen Yang, Cheng-Ting Liu
  • Publication number: 20040049704
    Abstract: An apparatus for dynamically adjusting power consumption of a CPU in a computer system is described. A current flowing through the limiting resistor is detected and whether or not this current is larger than a predetermined current is determined. A warning signal is issued when the current is larger than this predetermined signal. The warning signal triggers the software framework and the hardware framework of the apparatus to issue an asynchronous operation frequency reduction instruction to the CPU of the computer system.
    Type: Application
    Filed: December 11, 2002
    Publication date: March 11, 2004
    Applicant: QUANTA COMPUTER INC.
    Inventors: Yu-Jen Yang, Cheng-Ting Liu