Patents by Inventor Cheng-Tung Wang
Cheng-Tung Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955154Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.Type: GrantFiled: May 16, 2022Date of Patent: April 9, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
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Patent number: 11942130Abstract: A bottom-pinned spin-orbit torque magnetic random access memory (SOT-MRAM) is provided in the present invention, including a substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction (MTJ) on the bottom electrode layer, a spin-orbit torque (SOT) layer on the MTJ, a capping layer on the SOT layer, and an injection layer on the capping layer, wherein the injection layer is divided into individual first part and second part, and the first part and the second part are connected respectively with two ends of the capping layer.Type: GrantFiled: March 23, 2022Date of Patent: March 26, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Jian-Jhong Chen, Yi-Ting Wu, Jen-Yu Wang, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh
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Patent number: 11940388Abstract: Example methods are provided to improve placement of an adaptor (210,220) to a mobile computing device (100) to measure a test strip (221) coupled to the adaptor (220) with a camera (104) and a screen (108) on a face of the mobile computing device (100). The method may include displaying a light area on a first portion of the screen (108). The first portion may be adjacent to the camera (104). The light area and the camera (104) may be aligned with a key area of the test strip (221) so that the camera (104) is configured to capture an image of the key area. The method may further include providing first guiding information for a user to place the adaptor (210,220) to the mobile computing device (100) according to a position of the light area on the screen (108).Type: GrantFiled: March 16, 2018Date of Patent: March 26, 2024Assignee: IXENSOR CO., LTD.Inventors: Yenyu Chen, An Cheng Chang, Tai I Chen, Su Tung Yang, Chih Jung Hsu, Chun Cheng Lin, Min Han Wang, Shih Hao Chiu
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Patent number: 11916131Abstract: According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes: providing a protrusion over a substrate; forming an etch stop layer over the protrusion; laterally etching a sidewall of the etch stop layer; forming an insulating layer over the etch stop layer; forming a film layer over the insulating layer and the etch stop layer; performing chemical mechanical polishing on the film layer and exposing the etch stop layer; etching a portion of the etch stop layer to expose a top surface of the protrusion; forming an oxide layer over the protrusion and the film layer; and performing chemical mechanical polishing on the oxide layer and exposing the film layer.Type: GrantFiled: November 4, 2020Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: De-Fang Chen, Teng-Chun Tsai, Cheng-Tung Lin, Li-Ting Wang, Chun-Hung Lee, Ming-Ching Chang, Huan-Just Lin
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Publication number: 20230195671Abstract: A storage enclosure connected to a server via an external network and includes a network switch, an expander that is connected to the network switch and that is configured to generate enclosure data that supports a format conforming with SCSI Enclosure Services, and a board management controller (BMC) that is connected to the network switch and the expander. The BMC is configured to translate the enclosure data into enclosure translating data that supports a Redfish® format. The expander is configured to, after generating the enclosure data, transmit the enclosure data through the network switch to the BMC via an internal network. The BMC is configured to translate the enclosure data into the enclosure translating data, and to transmit the enclosure translating data to the network switch. The network switch transmits the enclosure translating data to the server through the external network.Type: ApplicationFiled: December 14, 2022Publication date: June 22, 2023Inventors: Jyun-Jie WANG, Shao-Che CHANG, Cheng-Tung WANG, Yen-Lun TSENG, Chin-Hung TAN
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Patent number: 11513697Abstract: A control system for a storage apparatus includes two input/output modules (IOMs), and two non-volatile memory (NVM) devices that are electrically connected to the IOMs, respectively, and that each store a firmware code. Each of the IOMs is configured to execute a firmware corresponding to the firmware code stored in the corresponding NVM device, and to enter an active mode or a passive mode after executing the firmware. The IOMs are configured such that when one IOM operating in the passive mode detects abnormal operation of the other IOM operating in the active mode, the one IOM sends, to the other IOM, the firmware code stored in the NVM device electrically connected to the one IOM, in order to update the firmware code in the NVM device electrically connected to the other IOM.Type: GrantFiled: September 3, 2021Date of Patent: November 29, 2022Assignee: MITAC COMPUTING TECHNOLOGY CORPORATIONInventors: Jyun-Jie Wang, Cheng-Tung Wang, Yen-Lun Tseng
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Publication number: 20220075533Abstract: A control system for a storage apparatus includes two input/output modules (IOMs), and two non-volatile memory (NVM) devices that are electrically connected to the IOMs, respectively, and that each store a firmware code. Each of the IOMs is configured to execute a firmware corresponding to the firmware code stored in the corresponding NVM device, and to enter an active mode or a passive mode after executing the firmware. The IOMs are configured such that when one IOM operating in the passive mode detects abnormal operation of the other IOM operating in the active mode, the one IOM sends, to the other IOM, the firmware code stored in the NVM device electrically connected to the one IOM, in order to update the firmware code in the NVM device electrically connected to the other IOM.Type: ApplicationFiled: September 3, 2021Publication date: March 10, 2022Inventors: Jyun-Jie WANG, Cheng-Tung WANG, Yen-Lun TSENG
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Patent number: 10942555Abstract: A power supplying method for a computer system is proposed. The computer system includes a first computer node, a first power supply unit corresponding to the first computer node, a second computer node, a second power supply unit corresponding to the second computer node, and a connection module electrically connected to the computer nodes and the power supply units. The power supplying method includes: detecting, by the first computer node, whether the second power supply unit operates abnormally; and upon detecting at least that the second power supply unit operates abnormally, controlling, by the first computer node, the first power supply unit to provide electric power to the second computer node through the connection module.Type: GrantFiled: October 18, 2018Date of Patent: March 9, 2021Assignee: Mitac Computing Technology CorporationInventors: Ming-Li Tsai, Jyun-Jie Wang, Cheng-Tung Wang, Chia-Ming Liu, Ming-Hsuan Tsai
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Publication number: 20190121413Abstract: A power supplying method for a computer system is proposed. The computer system includes a first computer node, a first power supply unit corresponding to the first computer node, a second computer node, a second power supply unit corresponding to the second computer node, and a connection module electrically connected to the computer nodes and the power supply units. The power supplying method includes: detecting, by the first computer node, whether the second power supply unit operates abnormally; and upon detecting at least that the second power supply unit operates abnormally, controlling, by the first computer node, the first power supply unit to provide electric power to the second computer node through the connection module.Type: ApplicationFiled: October 18, 2018Publication date: April 25, 2019Inventors: Ming-Li TSAI, Jyun-Jie WANG, Cheng-Tung WANG, Chia-Ming LIU, Ming-Hsuan TSAI
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Patent number: 6891495Abstract: An analog-to-digital converter including analog-to-digital converting units connected in serial. The current comparator includes a current input terminal to receive a sampling current, a reference current input terminal to receive a reference current and a bit output terminal for outputting a bit signal. The current operation circuit includes a current output terminal for outputting a compared current according to the sampling current and the reference current. The operation controlling terminal selects the compared current according to the bit signal. The controlling terminal receives a clock signal to latch the bit signal. The analog-to-digital converting units output the bit signals in sequence in a period of the clock signal.Type: GrantFiled: June 2, 2003Date of Patent: May 10, 2005Assignee: Endpoints Technology CorporationInventors: Jiann-Jong Chen, Po-Jen Huang, Hung-Yih Lin, Cheng-Tung Wang
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Publication number: 20040080446Abstract: An analog-to-digital converter including analog-to-digital converting units connected in serial. The current comparator includes a current input terminal to receive a sampling current, a reference current input terminal to receive a reference current and a bit output terminal for outputting a bit signal. The current operation circuit includes a current output terminal for outputting a compared current according to the sampling current and the reference current. The operation controlling terminal selects the compared current according to the bit signal. The controlling terminal receives a clock signal to latch the bit signal. The analog-to-digital converting units output the bit signals in sequence in a period of the clock signal.Type: ApplicationFiled: June 2, 2003Publication date: April 29, 2004Applicant: EndPoints Technology CorporationInventors: Jiann-Jong Chen, Po-Jen Huang, Hung-Yih Lin, Cheng-Tung Wang