Patents by Inventor Cheng Wang

Cheng Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230052592
    Abstract: Disclosed are a low-cost ultra-high-strength multiphase steel plate/steel strip and its manufacturing method. Said steel plate/steel strip comprises the following components in percentage by weight: 0.03 to 0.07% of C, 0.1 to 0.5% of Si, 1.3 to 1.9% of Mn, less than or equal to 0.02% of P, less than or equal to 0.01% of S, 0.01 to 0.05% of Al, 0.2 to 0.5% of Cr, 0.07 to 0.14% of Ti, less than 0.03% of (Ni+Nb+Mo+V), and the balance being Fe and other inevitable impurities; and Mn+1.5Cr+5(Ti+Al+Cu)+10(Mo+Ni)+20(Nb+V)<3.0; Mn+2Cr+4Ti+4Nb+4V+4Mo—Si/3+2C?3.0. The steel plate is mainly used for the manufacturing of automotive chassis and suspension system parts.
    Type: Application
    Filed: December 30, 2020
    Publication date: February 16, 2023
    Applicant: BAOSHAN IRON & STEEL CO., LTD.
    Inventors: Hanlong ZHANG, Yiqiang SUN, Xinping MAO, Yulong ZHANG, Cheng WANG, Xinyan JIN, Li WANG, Shuize WANG
  • Publication number: 20230049538
    Abstract: Kerr and electro-optic frequency comb generation in integrated lithium niobate devices is provided. In various embodiments, a microring resonator comprising lithium niobate is disposed on a thermal oxide substrate. The microring resonator has inner and outer edges. Electrodes are positioned along the inner and outer edges of the microring resonator. The electrodes are adapted to modulate the refractive index of the microring. A pump laser is optically coupled to the microring resonator. The microring resonator is adapted to emit an electro-optical frequency comb when receiving a pump mode from the pump laser and when the electrodes are driven at a frequency equal to a free-spectral-range of the microring resonator.
    Type: Application
    Filed: October 20, 2022
    Publication date: February 16, 2023
    Applicants: President and Fellows of Harvard College, The Board of Trustees of the Leland Stanford Junior University
    Inventors: Mian Zhang, Cheng Wang, Marko Loncar, Brandon Taylor BUSCAINO, Joseph M. KAHN
  • Patent number: 11577228
    Abstract: The present invention relates to the field of catalysts, and provides a porous layered transition metal dichalcogenide (TMD) and a preparation method and use thereof. The preparation method includes the following steps: (1) mixing silica microspheres, a transition metal salt and an elemental chalcogen, and pressing to obtain a tablet, the silica microspheres having a same or different particle diameters; and (2) sintering the tablet under hydrogen, and removing the silica microspheres to obtain the porous layered TMD. The porous layered TMD prepared by the method of the present invention has a high lattice edge exposure, which provides more active sites and higher catalytic activity, so the porous layered TMD can effectively catalyze the oxidation of alcohols to aldehydes or sulfides to sulfoxides under visible light irradiation.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: February 14, 2023
    Assignee: HANGZHOU NORMAL UNIVERSITY
    Inventors: Cheng Wang, Weiming Xu, Huilin Zheng, Pengfei Zhang, Hongyun Shen, Xiaoling Li
  • Publication number: 20230035044
    Abstract: A female connector includes an insulating body, a terminal module, at least one elastic element and at least one lateral shell. At least one side of the insulating body defines an opening. A middle of the insulating body defines an accommodating space. The terminal module is mounted in the accommodating space. The terminal module includes a plurality of terminals. The at least one elastic element is mounted to a surface of the insulating body which is parallel to an extending direction of each terminal. The at least one elastic element has a clamping portion, and a transverse width of the clamping portion is equal to a distance between two inner surfaces of two sides of the insulating body. The at least one lateral shell is assembled to at least one side surface of the insulating body.
    Type: Application
    Filed: May 17, 2022
    Publication date: February 2, 2023
    Inventors: CHENG-WANG YANG, YAN SUN, HSIN-MIN CHAO
  • Publication number: 20230032938
    Abstract: A battery top cover assembly structure includes a top cover sheet and an electrode column arranged thereon. The top cover sheet is provided with a mounting hole for mounting the electrode column. An insulating part and a plastic part are sleevedly arranged on the electrode column in sequence. The plastic part is embedded in a bottom of the mounting hole. A bottom of the electrode column is fixedly provided on a bottom surface of the plastic part.
    Type: Application
    Filed: October 9, 2022
    Publication date: February 2, 2023
    Inventors: Bin JIANG, Yongjun LI, Cheng WANG, Wuyuan ZOU
  • Patent number: 11569730
    Abstract: A power supply device includes a pulse frequency modulation controller circuitry and a cycle controller circuitry. The pulse frequency modulation controller circuitry is configured to adjust a transiting speed of a first signal according to at least one control bit, and to compare the first signal with a first reference voltage to generate a second signal, and to generate a driving signal to a power converter circuit according to an output voltage, a second reference voltage, and the second signal, in which the power converter circuit is configured to generate the output voltage according to the driving signal. The cycle controller circuitry is configured to detect a frequency of the driving signal according to a clock signal having a predetermined frequency, in which the predetermined frequency is set based on a frequency range capable of being heard by humans.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: January 31, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Shih-Cheng Wang, Hung-Wan Liu, Shih-Chieh Chen, Chun-Fu Chang, Liang-Hui Li
  • Patent number: 11567051
    Abstract: Nanoreactors comprising a metal precursor in a carrier are provided as well as methods of initiating, methods of preparing, and methods of using nanoreactors. In some embodiments, upon exposure to heat, the metal precursor forms nanoparticles that can be detected, e.g., by detecting a color change in the nanoreactor and/or by detecting the number and/or size and/or size distribution and/or shape of the nanoparticles. The nanoreactors can be used, in some embodiments, as time-temperature indicators for perishable goods.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: January 31, 2023
    Assignee: WISCONSIN ALUMNI RESEARCH FOUNDATION
    Inventors: Sundaram Gunasekaran, Yi-Cheng Wang
  • Publication number: 20230022625
    Abstract: A method is proposed for providing a content page in an application. In the method, a media item is generated, and the media item is associated with respective resources in a resource list that is received from a resource provider. The media item is presented in the application. A content page is caused to be displayed in response to detecting an interaction event of a user of the application with the media item, the content page including respective content items for the respective resources. Therefore, the media item and the content page are generated and displayed in an automatic way for the one or more resource providers without any label work from the resource providers.
    Type: Application
    Filed: September 30, 2022
    Publication date: January 26, 2023
    Inventors: Liqun NI, Lingyuan KE, Pankesh JHAVERI, Haoyu JIANG, Yan YAN, Fan GAO, Cheng WANG, Junfu CHEN
  • Publication number: 20230028460
    Abstract: A semiconductor device includes an active region. A metal gate electrode is disposed over the active region. A conductive layer is disposed over the metal gate electrode. A silicon-containing layer is disposed over a first portion of the conductive layer. A dielectric layer is disposed over a second portion of the conductive layer. A gate via vertically extends through the silicon-containing layer. The gate via is disposed over, and electrically coupled to, the metal gate electrode.
    Type: Application
    Filed: April 21, 2022
    Publication date: January 26, 2023
    Inventors: Wei-Cheng Wang, Shih-Hang Chiu, Kuan-Ting Liu, Cheng-Lung Hung, Chi On Chui
  • Publication number: 20230012784
    Abstract: In an approach, a processor identifies a plurality of text separators in a borderless table, a text separator of the plurality of text separators defining a non-text region between two consecutive text lines in the borderless table. A processor classifies the plurality of text separators into a number of target clusters comprised in a target group based on property information related to the plurality of text separators, the number of target clusters corresponding to a number of separator types. A processor provides indication information to indicate respective separator types of the plurality of text separators based on a result of the classifying.
    Type: Application
    Filed: July 19, 2021
    Publication date: January 19, 2023
    Inventors: Ang Yi, Nazrul Islam, Rajesh M. Desai, Jing Zhang, Dong Rui Li, Xue Mei Deng, Ye Chen, Hai Cheng Wang
  • Publication number: 20230016381
    Abstract: A semiconductor structure includes a semiconductor fin protruding from a substrate; a gate structure engaging with the semiconductor fin. The semiconductor structure also includes an interlayer dielectric (ILD) layer disposed over the substrate and adjacent to the gate structure, where a top surface of the gate structure is below a top surface of the ILD layer; a first metal layer in direct contact with a top surface of the gate structure; a second metal layer disposed over the first metal layer, where the first metal layer is disposed on bottom and sidewall surfaces of the second metal layer, where the bottom surface of the second metal layer has a concave profile, and where the second metal layer differs from the first metal layer in composition; and a gate contact disposed over the second metal layer.
    Type: Application
    Filed: May 6, 2022
    Publication date: January 19, 2023
    Inventors: Wei-Cheng Wang, Shih-Hang Chiu, Kuan-Ting Liu, Chi On Chui, Chia-Wei Chen, Jian-Hao Chen
  • Publication number: 20230020731
    Abstract: The present disclosure describes a semiconductor device with a rare earth metal oxide layer and a method for forming the same. The method includes forming fin structures on a substrate and forming superlattice structures on the fin structures, where each of the superlattice structures includes a first-type nanostructured layer and a second-type nanostructured layer. The method further includes forming an isolation layer between the superlattice structures, implanting a rare earth metal into a top portion of the isolation layer to form a rare earth metal oxide layer, and forming a polysilicon structure over the superlattice structures. The method further includes etching portions of the superlattice structures adjacent to the polysilicon structure to form a source/drain (S/D) opening and forming an S/D region in the S/D opening.
    Type: Application
    Filed: November 23, 2021
    Publication date: January 19, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Han-Yu Lin, Szu-Hua Chen, Kuan-Kan Hu, Kenichi Sano, Po-Cheng Wang, Wei-Yen Woon, Pinyen Lin, Che Chi Shih
  • Publication number: 20230010065
    Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary semiconductor structure includes a gate structure. The gate structure includes a gate dielectric layer, an n-type work function layer embedded in the gate dielectric layer, a dielectric capping layer embedded in the n-type work function layer, and a p-type work function layer embedded in the dielectric capping layer. A top surface of the gate structure exposes the n-type work function layer, the dielectric capping layer, and the p-type work function layer. The semiconductor structure also includes a first metal cap on the n-type work function layer and a second metal cap on the p-type work function layer. The first metal cap is spaced apart from the second metal cap. without formed on the dielectric capping layer.
    Type: Application
    Filed: June 7, 2022
    Publication date: January 12, 2023
    Inventors: Shih-Hang Chiu, Chung-Chiang Wu, Wei-Cheng Wang, Chia-Wei Chen, Jian-Hao Chen, Kuan-Ting Liu, Chi On Chui
  • Publication number: 20230010717
    Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a semiconductor fin and a gate stack wrapped around the channel structures. The semiconductor device structure also includes a source/drain epitaxial structure adjacent to the channel structures and multiple inner spacers. Each of the inner spacers is between the gate stack and the source/drain epitaxial structure. The semiconductor device structure further includes an isolation structure between the semiconductor fin and the source/drain epitaxial structure.
    Type: Application
    Filed: July 8, 2021
    Publication date: January 12, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Cheng WANG, Ting-Yeh CHEN, De-Fang CHEN, Wei-Yang LEE
  • Publication number: 20230010952
    Abstract: A semiconductor device includes stacks of nano-structures that each extend in a first horizontal direction. The stacks each extend in a vertical direction and are separated from one another in a second horizontal direction. A first gate is disposed over a first subset of the stacks. A second gate is disposed over a second subset of the stacks. A first conductive capping layer is disposed over a substantial entirety of an upper surface of the first gate. A second conductive capping layer is disposed over a substantial entirety of an upper surface of the second gate. A dielectric structure is disposed between the first gate and the second gate in the second horizontal direction. The dielectric structure physically and electrically separates the first gate and the second gate. An upper surface of the dielectric structure is substantially free of having the first or second conductive capping layers disposed thereon.
    Type: Application
    Filed: May 5, 2022
    Publication date: January 12, 2023
    Inventors: Chia-Wei Chen, Wei Cheng Hsu, Hui-Chi Chen, Jian-Hao Chen, Kuo-Feng Yu, Shih-Hang Chiu, Wei-Cheng Wang, Yen-Ju Chen, Chun-Chih Cheng
  • Patent number: 11552978
    Abstract: A disaster security resource calculation method includes obtaining disaster prevention data of a place to be evaluated and loss assessment data of the place in a disaster scenario, and determining disaster security resources required by the place to be evaluated in the disaster scenario using a preset calculation model according to the disaster prevention data and the loss assessment data. The disaster prevention data includes environmental information, item information, and personnel information.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: January 10, 2023
    Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventor: Shih-Cheng Wang
  • Patent number: 11549501
    Abstract: A fluid driving system includes a vibration unit, a piezoelectric element, a signal transmission layer, a plane unit, and a protrusion. The piezoelectric element includes a first electrode and a second electrode electrically isolated from each other. The signal transmission layer includes a first conductive zone and a second conductive zone. The first electrode of the piezoelectric element is electrically connected to the first conductive zone of the signal transmission layer, and the second electrode of the piezoelectric element is electrically connected to the second conductive zone of the signal transmission layer. The plane unit has at least one hole. The piezoelectric element, the signal transmission layer, and the plane unit are located at one side of the vibration unit. The protrusion is located between the vibration unit and the plane unit, and the protrusion corresponds to and protrudes toward the at least one hole.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: January 10, 2023
    Assignee: KOGE MICRO TECH CO., LTD.
    Inventors: Chung-Han Wu, Jun-Yan Huang, Hsin-Cheng Wang
  • Publication number: 20230004858
    Abstract: Techniques for managing a software build using a machine learning model are disclosed. A system obtains historical data associated with historical software builds. The historical data includes attribute data for a plurality of development stages associated with a historical software build and labels indicating success or failure for the plurality of development stages. The system trains a machine learning model using the historical data associated with the historical software builds to generate predictions of success or failure of the plurality of development stages. The system receives attributes of a target software build and a selection of a first target development stage of the target software build. The system applies the machine learning model to the target software build to generate a first prediction of success or failure of the first target development stage.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Applicant: Oracle International Corporation
    Inventors: Harish Santhanagopal, Jiun-Cheng Wang
  • Patent number: 11537026
    Abstract: Kerr and electro-optic frequency comb generation in integrated lithium niobate devices is provided. In various embodiments, a microring resonator comprising lithium niobate is disposed on a thermal oxide substrate. The microring resonator has inner and outer edges. Electrodes are positioned along the inner and outer edges of the microring resonator. The electrodes are adapted to modulate the refractive index of the microring. A pump laser is optically coupled to the microring resonator. The microring resonator is adapted to emit an electro-optical frequency comb when receiving a pump mode from the pump laser and when the electrodes are driven at a frequency equal to a free-spectral-range of the microring resonator.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: December 27, 2022
    Assignees: PRESIDENT AND FELLOWS OF HARVARD COLLEGE, THE BOARD OF TRUSTEES OF LELAND STANFORD JUNIOR UNIVERSITY
    Inventors: Mian Zhang, Cheng Wang, Marko Loncar, Brandon Taylor Buscaino, Joseph M. Kahn
  • Publication number: 20220402888
    Abstract: Novel co-crystal and eutectic crystal of kojic acid and a co-former that are excellent in physical properties are provided. In one aspect, novel co-crystals of kojic acid and a co-former that is maltol or ethyl maltol are provided. In another aspect, novel crystal of a eutectic mixture of kojic acid and a co-former that is selected from the group consisting of, maltol, ethyl maltol, methyl paraben and propyl gallate are provided. Methods for producing the novel co-crystal or eutectic crystal are also described. The novel co-crystals and eutectic crystals may be included in a pharmaceutical composition, a health food product or a medical food product for the treatment and/or prophylaxis of a neuropsychiatric disorder.
    Type: Application
    Filed: July 15, 2022
    Publication date: December 22, 2022
    Applicant: SyneuRx International (Taiwan) Corp.
    Inventors: Guo-Chuan Emil TSAI, Ching-Cheng WANG, Tien-Lan HSIEH