Patents by Inventor Cheng-Wei JIANG
Cheng-Wei JIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12125870Abstract: A stretchable display panel includes a first stretchable film, a first transparent optical clear adhesive, a patterned organic layer, multiple light-emitting elements, and multiple wires. The first transparent optical clear adhesive is located on the first stretchable film. The patterned organic layer includes multiple first island portions and multiple first bridge portions. Any adjacent two of the first island portions are connected via a corresponding one of the first bridge portions. The light-emitting elements are located above the first island portions. The first transparent optical clear adhesive is located between the light-emitting elements and the first stretchable film. A first surface of the patterned organic layer faces away from the light-emitting elements. An included angle between the first surface and a first side surface of the first island portions is greater than 90 degrees. The wires are located above the first bridge portions.Type: GrantFiled: March 24, 2022Date of Patent: October 22, 2024Assignee: Au Optronics CorporationInventors: Cheng-Wei Jiang, Yi-Da He
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Patent number: 12034106Abstract: The present disclosure provides a flexible display panel, which includes a substrate, a plurality of hollow regions, a plurality of display units, a plurality of wire structures, and a plurality of spacers. The substrate is defined as a plurality of island regions and a plurality of bridge regions. Each of the hollow regions is surrounded by four adjacent of the island regions and four adjacent of the bridge regions. The display units are respectively disposed on the island regions of the substrate. The wire structures are respectively disposed on the bridge regions and electrically connected to the display units. Each of the wire structures includes at least one wire layer including at least one wire disposed on the substrate. The spacers are disposed on and in contact with the substrate, and respectively surround the hollow regions, and separated from the wire structures to control etching sizing.Type: GrantFiled: September 2, 2021Date of Patent: July 9, 2024Assignee: AU OPTRONICS CORPORATIONInventors: Cheng-Wei Jiang, Yi-Da He
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Publication number: 20230216010Abstract: A stretchable display panel includes a substrate, a plurality of circuit structures, a plurality of light-emitting components, a plurality of signal lines, a laser absorbing layer and a stretchable filling material. The substrate has a plurality of island sections and a plurality of bridge sections. The island sections are connected to the bridge sections, and both the island sections and the bridge sections define the openings of the substrate. The circuit structures are disposed on the island sections. The light-emitting components are disposed on the circuit structures. The signal lines are disposed on the bridge sections, and the signal lines are electrically connected to the circuit structures. The laser absorbing layer is disposed in at least the openings. The stretchable filling material is disposed above the substrate, where the stretchable filling material covers at least both the laser absorbing layer and the light-emitting components.Type: ApplicationFiled: December 28, 2022Publication date: July 6, 2023Inventors: Cheng-Wei JIANG, Yi-Da HE
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Publication number: 20230140381Abstract: A stretchable display panel includes a first stretchable film, a first transparent optical clear adhesive, a patterned organic layer, multiple light-emitting elements, and multiple wires. The first transparent optical clear adhesive is located on the first stretchable film. The patterned organic layer includes multiple first island portions and multiple first bridge portions. Any adjacent two of the first island portions are connected via a corresponding one of the first bridge portions. The light-emitting elements are located above the first island portions. The first transparent optical clear adhesive is located between the light-emitting elements and the first stretchable film. A first surface of the patterned organic layer faces away from the light-emitting elements. An included angle between the first surface and a first side surface of the first island portions is greater than 90 degrees. The wires are located above the first bridge portions.Type: ApplicationFiled: March 24, 2022Publication date: May 4, 2023Applicant: Au Optronics CorporationInventors: Cheng-Wei Jiang, Yi-Da He
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Publication number: 20230105157Abstract: A stretchable substrate metal structure includes a patterned insulating structure, conductive wires, display elements, and covering layers. The patterned insulating structure includes device portions and circuit portions. The surface of each device portion has at least one first groove. At least two of the device portion are separated by a recess. A width of each circuit portion is less than a width of each device portion. Adjacent device portions are connected via corresponding circuit portions. The conductive wires are located in the circuit portions. The display elements are located on the device portions. The at least one first groove of each device portion at least partially surrounds a corresponding display element. Each covering layer is located on a corresponding device portion and covers the corresponding display element.Type: ApplicationFiled: September 28, 2022Publication date: April 6, 2023Inventors: Cheng-Wei JIANG, Yi-Da HE
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Publication number: 20220399484Abstract: The present disclosure provides a flexible display panel, which includes a substrate, a plurality of hollow regions, a plurality of display units, a plurality of wire structures, and a plurality of spacers. The substrate is defined as a plurality of island regions and a plurality of bridge regions. Each of the hollow regions is surrounded by four adjacent of the island regions and four adjacent of the bridge regions. The display units are respectively disposed on the island regions of the substrate. The wire structures are respectively disposed on the bridge regions and electrically connected to the display units. Each of the wire structures includes at least one wire layer including at least one wire disposed on the substrate. The spacers are disposed on and in contact with the substrate, and respectively surround the hollow regions, and separated from the wire structures to control etching sizing.Type: ApplicationFiled: September 2, 2021Publication date: December 15, 2022Inventors: Cheng-Wei JIANG, Yi-Da HE
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Patent number: 10263019Abstract: A flexible panel includes a substrate, a first insulating layer, a second insulating layer, a sacrificial layer, and a metal wiring layer. The substrate has an active area, a peripheral area, and an intermediate area. The first insulating layer is in the three areas of the substrate, and the first insulating layer in the intermediate area has a first pattern. The second insulating layer is on the first insulating layer. The second insulating layer in the intermediate area has a first opening extending along a first direction, so that the second insulating layer does not cover the first pattern of the first insulating layer. The sacrificial layer is between the first insulating layer and the second insulating layer in the intermediate area, and does not cover the first pattern of the first insulating layer. The metal wiring layer extends between the active area and the peripheral area.Type: GrantFiled: April 19, 2018Date of Patent: April 16, 2019Assignee: AU OPTRONICS CORPORATIONInventors: Pei-Yun Wang, Cheng-Wei Jiang, Ting-Yu Hsu, Ya-Qin Huang, Hsiang-Yun Hsiao, Chia-Kai Chen
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Publication number: 20180308877Abstract: A flexible panel includes a substrate, a first insulating layer, a second insulating layer, a sacrificial layer, and a metal wiring layer. The substrate has an active area, a peripheral area, and an intermediate area. The first insulating layer is in the three areas of the substrate, and the first insulating layer in the intermediate area has a first pattern. The second insulating layer is on the first insulating layer. The second insulating layer in the intermediate area has a first opening extending along a first direction, so that the second insulating layer does not cover the first pattern of the first insulating layer. The sacrificial layer is between the first insulating layer and the second insulating layer in the intermediate area, and does not cover the first pattern of the first insulating layer. The metal wiring layer extends between the active area and the peripheral area.Type: ApplicationFiled: April 19, 2018Publication date: October 25, 2018Inventors: Pei-Yun WANG, Cheng-Wei JIANG, Ting-Yu HSU, Ya-Qin HUANG, Hsiang-Yun HSIAO, Chia-Kai CHEN
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Patent number: 9891501Abstract: A method of fabricating a polycrystalline silicon thin film transistor device includes the following steps. A substrate is provided, and a buffer layer having dopants is formed on the substrate. An amorphous silicon layer is formed on the buffer layer having the dopants. A thermal process is performed to convert the amorphous silicon layer into a polycrystalline silicon layer by means of polycrystalization, and to simultaneously out-diffuse a portion of the dopants in the buffer layer into the polycrystalline silicon layer for adjusting a threshold voltage. The polycrystalline silicon layer is patterned to form an active layer. A gate insulating layer is formed on the active layer. A gate electrode is formed on the gate insulating layer. A source doped region and a drain doped region are formed in the active layer.Type: GrantFiled: September 14, 2016Date of Patent: February 13, 2018Assignee: AU OPTRONICS CORPORATIONInventors: Hsiang-Yun Hsiao, Chia-Kai Chen, Shih-Liang Lin, Ting-Yu Hsu, Pei-Yun Wang, Ya-Qin Huang, Cheng-Wei Jiang
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Publication number: 20170084457Abstract: A method of fabricating a polycrystalline silicon thin film transistor device includes the following steps. A substrate is provided, and a buffer layer having dopants is formed on the substrate. An amorphous silicon layer is formed on the buffer layer having the dopants. A thermal process is performed to convert the amorphous silicon layer into a polycrystalline silicon layer by means of polycrystalization, and to simultaneously out-diffuse a portion of the dopants in the buffer layer into the polycrystalline silicon layer for adjusting a threshold voltage. The polycrystalline silicon layer is patterned to form an active layer. A gate insulating layer is formed on the active layer. A gate electrode is formed on the gate insulating layer. A source doped region and a drain doped region are formed in the active layer.Type: ApplicationFiled: September 14, 2016Publication date: March 23, 2017Inventors: Hsiang-Yun HSIAO, Chia-Kai CHEN, Shih-Liang LIN, Ting-Yu HSU, Pei-Yun WANG, Ya-Qin HUANG, Cheng-Wei JIANG