Patents by Inventor CHENG WEI SONG

CHENG WEI SONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103279
    Abstract: An optical system is provided. The optical system includes a light source assembly, a sensing element, and a light guiding element. The light source assembly is used for generating first light and second light. The sensing element is used for sensing third light from the second light reflected by an eye. The light guiding element is used for transporting the first light, the second light, and the third light. Wavelengths of the first light and the second light are different.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 28, 2024
    Inventors: Chih-Wei WENG, Chao-Chang HU, Cheng-Jui CHANG, Sin-Jhong SONG
  • Publication number: 20240094542
    Abstract: An optical system is provided. The optical system includes a light source assembly, a light guiding element, and a first optical assembly. The light source assembly is used for generating first light and second light. The light guiding element is used for transporting the first light and the second light. The first optical assembly is disposed between the light guiding element and the light source assembly and used for transporting the first light and the second light. Wavelengths of the first light and the second light are different.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 21, 2024
    Inventors: Chih-Wei WENG, Chao-Chang HU, Cheng-Jui CHANG, Sin-Jhong SONG
  • Patent number: 11296722
    Abstract: Techniques for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer are provided. A PCS transmit structure is configured to receive data from a MAC sublayer, the PCS transmit structure comprising a first FEC hardware module that performs FEC encoding, in a first clock domain, on the data to generate FEC encoded data. Further, a PCS receive structure configured to receive the FEC encoded data from the PCS transmit structure, the PCS receive structure comprising a second FEC hardware module is configured to perform FEC decoding, in the second clock domain, on the FEC encoded data to generate FEC decoded data.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: April 5, 2022
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Cheng Wei Song, Fabrice Jean Verplanken
  • Publication number: 20200145022
    Abstract: Techniques for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer are provided. A PCS transmit structure is configured to receive data from a MAC sublayer, the PCS transmit structure comprising a first FEC hardware module that performs FEC encoding, in a first clock domain, on the data to generate FEC encoded data. Further, a PCS receive structure configured to receive the FEC encoded data from the PCS transmit structure, the PCS receive structure comprising a second FEC hardware module is configured to perform FEC decoding, in the second clock domain, on the FEC encoded data to generate FEC decoded data.
    Type: Application
    Filed: January 7, 2020
    Publication date: May 7, 2020
    Inventors: Claude BASSO, Cheng Wei SONG, Fabrice Jean VERPLANKEN
  • Patent number: 10574262
    Abstract: Techniques for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer are provided. A PCS transmit structure is configured to receive data from a MAC sublayer, the PCS transmit structure comprising a first FEC hardware module that inserts one or more alignment markers in the data and performs FEC encoding, in a first clock domain, on the one or more alignment markers and the data to generate FEC encoded data. Further, a PCS receive structure configured to receive the FEC encoded data from the PCS transmit structure, the PCS receive structure comprising a second FEC hardware module is configured to perform FEC decoding, in the second clock domain, on the FEC encoded data to generate FEC decoded data, and remove the one or more alignment markers from the FEC decoded data.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: February 25, 2020
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Cheng Wei Song, Fabrice Jean Verplanken
  • Patent number: 10432218
    Abstract: Techniques are provided for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer. Data is received at a PCS transmit structure from a MAC sublayer, and one or more alignment markers are inserted in the data. FEC encoding is performed, in a first clock domain, on the one or more alignment markers and the data in the PCS transmit structure to generate FEC encoded data. The FEC encoded data is transmitted from the first clock domain with a first clock cycle to a second clock domain with a second clock cycle, and the FEC encoded data is transmitted on one or more physical medium attachment (PMA) lanes to a PCS receive structure. FEC decoding is performed, in the second clock domain, on the FEC encoded data in the PCS receive structure to generate FEC decoded data.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: October 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Cheng Wei Song, Fabrice Jean Verplanken
  • Publication number: 20190140771
    Abstract: Techniques for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer are provided. A PCS transmit structure is configured to receive data from a MAC sublayer, the PCS transmit structure comprising a first FEC hardware module that inserts one or more alignment markers in the data and performs FEC encoding, in a first clock domain, on the one or more alignment markers and the data to generate FEC encoded data. Further, a PCS receive structure configured to receive the FEC encoded data from the PCS transmit structure, the PCS receive structure comprising a second FEC hardware module is configured to perform FEC decoding, in the second clock domain, on the FEC encoded data to generate FEC decoded data, and remove the one or more alignment markers from the FEC decoded data.
    Type: Application
    Filed: October 5, 2018
    Publication date: May 9, 2019
    Inventors: Claude BASSO, Cheng Wei SONG, Fabrice Jean VERPLANKEN
  • Publication number: 20190036645
    Abstract: Techniques are provided for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer. Data is received at a PCS transmit structure from a MAC sublayer, and one or more alignment markers are inserted in the data. FEC encoding is performed, in a first clock domain, on the one or more alignment markers and the data in the PCS transmit structure to generate FEC encoded data. The FEC encoded data is transmitted from the first clock domain with a first clock cycle to a second clock domain with a second clock cycle, and the FEC encoded data is transmitted on one or more physical medium attachment (PMA) lanes to a PCS receive structure. FEC decoding is performed, in the second clock domain, on the FEC encoded data in the PCS receive structure to generate FEC decoded data.
    Type: Application
    Filed: October 5, 2018
    Publication date: January 31, 2019
    Inventors: Claude BASSO, Cheng Wei SONG, Fabrice Jean VERPLANKEN
  • Patent number: 10187085
    Abstract: The present discloses provides a decoding method, decoding apparatus and decoder for correcting burst errors. In particular, the decoding method for correcting burst errors comprises: computing an initial syndrome of a received data frame, wherein the data frame is encoded according to cyclic codes for correcting burst errors; determining error correctability of burst error contained in the data frame based on the computed initial syndrome; and processing the burst error in the data frame and outputting the processed data frame based on the determined error correctability. With the decoding method, decoding apparatus, and decoder of the present invention, error correctability of burst errors contained in a data frame can be determined before the data is send out, while having smaller decoding latency through determining the error correctability and error pattern of the burst errors contained in the data frame using initial syndrome of the data frame.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: January 22, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cheng Wei Song, Hao Yang, Fan Zhou, Hou Gang Li, Yufei Li
  • Patent number: 10164733
    Abstract: Method and apparatus for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer. The method includes performing a first forward error-correcting (FEC) sub-function on the data in the PCS transmit structure. The method further includes transmitting the data on one or more physical medium attachment (PMA) lanes to a PCS receive structure. The method also includes performing a second FEC sub-function on the data in the PCS receive structure.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: December 25, 2018
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Cheng Wei Song, Fabrice Jean Verplanken
  • Patent number: 10164734
    Abstract: Method and apparatus for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer. The method includes performing a first forward error-correcting (FEC) sub-function on the data in the PCS transmit structure. The method further includes transmitting the data on one or more physical medium attachment (PMA) lanes to a PCS receive structure. The method also includes performing a second FEC sub-function on the data in the PCS receive structure.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: December 25, 2018
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Cheng Wei Song, Fabrice Jean Verplanken
  • Patent number: 10110335
    Abstract: A system for reducing latency in a networking application includes a first clock domain operating at a first clock frequency, where a media access control (MAC) sublayer sends data to a physical coding sublayer (PCS) utilizing the first clock domain. The system also includes a second clock domain operating at a second clock frequency, where data is transmitted on one or more physical medium attachment (PMA) lanes utilizing the second clock domain, and where the first clock frequency and the second clock frequency have a fixed ratio. Data is transmitted from the first clock domain to the second clock domain without buffering the data.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: October 23, 2018
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Cheng Wei Song, Fabrice Jean Verplanken
  • Patent number: 10103830
    Abstract: A method for reducing latency in a networking application includes receiving data at a physical coding sublayer (PCS) from a media access control (MAC) sublayer, where the MAC sublayer utilizes a first clock domain operating at a first clock frequency. The method further includes performing one or more functions in the PCS on the data in the first clock domain. The method also includes transmitting the data on one or more physical medium attachment (PMA) lanes, where the one or more PMA lanes utilize a second clock domain operating at a second clock frequency, where the first clock frequency and the second clock frequency have a fixed ratio. The data is transmitted from the first clock domain to the second clock domain without buffering the data. The method also includes performing one or more functions in the PCS on the data in the second clock domain.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: October 16, 2018
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Cheng Wei Song, Fabrice Jean Verplanken
  • Patent number: 9820248
    Abstract: According to example embodiments of the present invention, predetermined patterns are inserted into data streams and exchanged between a master node and a slave node. By recognizing the patterns near the underlying interface of the physical layer, the master node and slave node can generate timestamps that exactly identify when the respective messages leaves and/or arrives at the physical layer. The slave clock can be synchronized to the master clock based on such timestamps.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: November 14, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Qian Hu, Yang Liu, Cheng Wei Song, Kai Yang
  • Publication number: 20170134051
    Abstract: The present discloses provides a decoding method, decoding apparatus and decoder for correcting burst errors. In particular, the decoding method for correcting burst errors comprises: computing an initial syndrome of a received data frame, wherein the data frame is encoded according to cyclic codes for correcting burst errors; determining error correctability of burst error contained in the data frame based on the computed initial syndrome; and processing the burst error in the data frame and outputting the processed data frame based on the determined error correctability. With the decoding method, decoding apparatus, and decoder of the present invention, error correctability of burst errors contained in a data frame can be determined before the data is send out, while having smaller decoding latency through determining the error correctability and error pattern of the burst errors contained in the data frame using initial syndrome of the data frame.
    Type: Application
    Filed: January 23, 2017
    Publication date: May 11, 2017
    Inventors: CHENG WEI SONG, HAO YANG, FAN ZHOU, HOU GANG LI, YUFEI LI
  • Patent number: 9608669
    Abstract: The present discloses provides a decoding method, decoding apparatus and decoder for correcting burst errors. In particular, the decoding method for correcting burst errors comprises: computing an initial syndrome of a received data frame, wherein the data frame is encoded according to cyclic codes for correcting burst errors; determining error correctability of burst error contained in the data frame based on the computed initial syndrome; and processing the burst error in the data frame and outputting the processed data frame based on the determined error correctability. With the decoding method, decoding apparatus, and decoder of the present invention, error correctability of burst errors contained in a data frame can be determined before the data is send out, while having smaller decoding latency through determining the error correctability and error pattern of the burst errors contained in the data frame using initial syndrome of the data frame.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: March 28, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cheng Wei Song, Hao Yang, Fan Zhou, Hou Gang Li, Yufei Li
  • Patent number: 9602271
    Abstract: A method for determining a slave clock to master clock time difference with an alignment marker. The method selects and transmits a first alignment marker at a first time by a transmitter that has a master clock in a first message to a receiver that has a slave clock. Subsequent to transmitting the first message, the method further transmits a second message that contains the first time and an identity of the first alignment marker. The method further receives the first message and records a second time that the first message is received. The method further receives the second message and the first time and the identity of the first alignment marker. The method further determines a transmission delay and generates a time difference from the slave clock to the master clock.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: March 21, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Yiftach Benjamini, Yang Liu, Cheng Wei Song, Kai Yang
  • Publication number: 20170041093
    Abstract: A system for reducing latency in a networking application includes a first clock domain operating at a first clock frequency, where a media access control (MAC) sublayer sends data to a physical coding sublayer (PCS) utilizing the first clock domain. The system also includes a second clock domain operating at a second clock frequency, where data is transmitted on one or more physical medium attachment (PMA) lanes utilizing the second clock domain, and where the first clock frequency and the second clock frequency have a fixed ratio.
    Type: Application
    Filed: October 20, 2016
    Publication date: February 9, 2017
    Inventors: Claude BASSO, Cheng Wei SONG, Fabrice Jean VERPLANKEN
  • Publication number: 20170041094
    Abstract: A method for reducing latency in a networking application includes receiving data at a physical coding sublayer (PCS) from a media access control (MAC) sublayer, where the MAC sublayer utilizes a first clock domain operating at a first clock frequency. The method further includes performing one or more functions in the PCS on the data in the first clock domain. The method also includes transmitting the data on one or more physical medium attachment (PMA) lanes, where the one or more PMA lanes utilize a second clock domain operating at a second clock frequency, where the first clock frequency and the second clock frequency have a fixed ratio. The data is transmitted from the first clock domain to the second clock domain without buffering the data. The method also includes performing one or more functions in the PCS on the data in the second clock domain.
    Type: Application
    Filed: October 20, 2016
    Publication date: February 9, 2017
    Inventors: Claude BASSO, Cheng Wei SONG, Fabrice Jean VERPLANKEN
  • Publication number: 20170006567
    Abstract: According to example embodiments of the present invention, predetermined patterns are inserted into data streams and exchanged between a master node and a slave node. By recognizing the patterns near the underlying interface of the physical layer, the master node and slave node can generate timestamps that exactly identify when the respective messages leaves and/or arrives at the physical layer. The slave clock can be synchronized to the master clock based on such timestamps.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 5, 2017
    Inventors: Qian HU, Yang LIU, Cheng Wei SONG, Kai YANG