Patents by Inventor Cheng-Yang Su
Cheng-Yang Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11887958Abstract: A die including a first contact with a first shape (e.g., ring-shaped) and a second contact with a second shape (e.g., cylindrical shaped) different from the first shape. The first contact has an opening that extends through a central region of a surface of the first contact. A first solder portion is coupled to the surface of the first contact and the first solder portion has the first shape. A second solder portion is coupled to a surface of the second contact and the second solder portion has the second shape. The first solder portion and the second solder portion both have respective points furthest away from a substrate of the die. These respective points of the first solder portion and the second solder portion are co-planar with each other such that a standoff height of the die remains consistent when coupled to a PCB or an electronic component.Type: GrantFiled: August 16, 2021Date of Patent: January 30, 2024Assignee: STMICROELECTRONICS LTDInventor: Cheng-Yang Su
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Patent number: 11749627Abstract: A fan-out wafer level package includes a semiconductor die with a redistribution layer on a sidewall of the semiconductor die. A redistribution layer positioned over the die includes an extended portion that extends along the sidewall. The semiconductor die is encapsulated in a molding compound layer. The molding compound layer is positioned between the extended portion of the redistribution layer and the sidewall of the semiconductor die. Solder contacts, for electrically connecting the semiconductor device to an electronic circuit board, are positioned on the redistribution layer. The solder contacts and the sidewall of the redistribution layer can provide electrical contact on two different locations. Accordingly, the package can be used to improve interconnectivity by providing vertical and horizontal connections.Type: GrantFiled: October 28, 2021Date of Patent: September 5, 2023Assignee: STMICROELECTRONICS LTDInventors: Endruw Jahja, Cheng-Yang Su
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Publication number: 20220059486Abstract: The present disclosure is directed to a die including a first contact with a first shape (e.g., a ring-shape contact) and second contact with a second shape different from the first shape (e.g., a cylindrical-shape contact). The first contact has an opening that extends through a central region of a surface of the first contact. A first solder portion is coupled to the surface of the first contact and the first solder portion has the first shape. A second solder portion is coupled to a surface of the second contact and the second solder portion has the second shape. The first solder portion and the second solder portion both have respective points furthest away from a substrate of the die. These respective points of the first solder portion and the second solder portion are co-planar with each other such that a standoff height of the die remains consistent when coupled to a PCB or an electronic component.Type: ApplicationFiled: August 16, 2021Publication date: February 24, 2022Applicant: STMICROELECTRONICS LTDInventor: Cheng-Yang SU
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Publication number: 20220051998Abstract: A fan-out wafer level package includes a semiconductor die with a redistribution layer on a sidewall of the semiconductor die. A redistribution layer positioned over the die includes an extended portion that extends along the sidewall. The semiconductor die is encapsulated in a molding compound layer. The molding compound layer is positioned between the extended portion of the redistribution layer and the sidewall of the semiconductor die. Solder contacts, for electrically connecting the semiconductor device to an electronic circuit board, are positioned on the redistribution layer. The solder contacts and the sidewall of the redistribution layer can provide electrical contact on two different locations. Accordingly, the package can be used to improve interconnectivity by providing vertical and horizontal connections.Type: ApplicationFiled: October 28, 2021Publication date: February 17, 2022Applicant: STMICROELECTRONICS LTDInventors: Endruw JAHJA, Cheng-Yang SU
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Patent number: 11195809Abstract: A fan-out wafer level package includes a semiconductor die with a redistribution layer on a sidewall of the semiconductor die. A redistribution layer positioned over the die includes an extended portion that extends along the sidewall. The semiconductor die is encapsulated in a molding compound layer. The molding compound layer is positioned between the extended portion of the redistribution layer and the sidewall of the semiconductor die. Solder contacts, for electrically connecting the semiconductor device to an electronic circuit board, are positioned on the redistribution layer. The solder contacts and the sidewall of the redistribution layer can provide electrical contact on two different locations. Accordingly, the package can be used to improve interconnectivity by providing vertical and horizontal connections.Type: GrantFiled: December 6, 2019Date of Patent: December 7, 2021Assignee: STMICROELECTRONICS LTDInventors: Endruw Jahja, Cheng-Yang Su
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Patent number: 11165276Abstract: A adapter having an inputting terminal and an outputting terminal is provided. The adapter further includes a converter having a first side and a second side, a testing switch having a first terminal and a second terminal, a detecting circuit and a first indicator. The first side is coupled to the inputting terminal. The second side is coupled to the outputting terminal. The converter is used to convert inputting power for providing outputting power to a load system. The first terminal is coupled to the second side. The detecting circuit is coupled to the second terminal. When the first terminal and the second terminal of the testing switch are conducted, the load system is disconnected with the adapter by the detecting circuit. The detecting circuit is used to detect an outputting signal for generating a detecting result. The first indicator sends a message according to the detecting result.Type: GrantFiled: June 30, 2017Date of Patent: November 2, 2021Assignee: CYBER POWER SYSTEMS, INC.Inventors: Yu-Sheng Wang, Hong-Lun Wang, Cheng-Yang Su
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Publication number: 20200211988Abstract: A fan-out wafer level package includes a semiconductor die with a redistribution layer on a sidewall of the semiconductor die. A redistribution layer positioned over the die includes an extended portion that extends along the sidewall. The semiconductor die is encapsulated in a molding compound layer. The molding compound layer is positioned between the extended portion of the redistribution layer and the sidewall of the semiconductor die. Solder contacts, for electrically connecting the semiconductor device to an electronic circuit board, are positioned on the redistribution layer. The solder contacts and the sidewall of the redistribution layer can provide electrical contact on two different locations. Accordingly, the package can be used to improve interconnectivity by providing vertical and horizontal connections.Type: ApplicationFiled: December 6, 2019Publication date: July 2, 2020Inventors: Endruw JAHJA, Cheng-Yang SU
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Patent number: 10352982Abstract: A testing system including an adapter and a testing circuit is provided. The adapter includes a converter having a first side and a second side, an inputting terminal and an outputting terminal. The testing circuit includes a testing switch having a first terminal and a second terminal, a detecting circuit and a first indicator. The first side is coupled to the inputting terminal. The second side is coupled to the outputting terminal. The converter is used to convert inputting power for providing outputting power to a load system. The first terminal is coupled to the outputting terminal. The detecting circuit is coupled to the second terminal. When the first terminal is couple with the outputting terminal and contacted with the second terminal, the detecting circuit is used to detect an outputting signal of converter for generating a detecting result. The first indicator sends a message according to the detecting result.Type: GrantFiled: June 30, 2017Date of Patent: July 16, 2019Assignee: CYBER POWER SYSTEMS, INC.Inventors: Yu-Sheng Wang, Hong-Lun Wang, Cheng-Yang Su
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Publication number: 20180335462Abstract: A testing system including an adapter and a testing circuit is provided. The adapter includes a converter having a first side and a second side, an inputting terminal and an outputting terminal. The testing circuit includes a testing switch having a first terminal and a second terminal, a detecting circuit and a first indicator. The first side is coupled to the inputting terminal. The second side is coupled to the outputting terminal. The converter is used to convert inputting power for providing outputting power to a load system. The first terminal is coupled to the outputting terminal. The detecting circuit is coupled to the second terminal. When the first terminal is couple with the outputting terminal and contacted with the second terminal, the detecting circuit is used to detect an outputting signal of converter for generating a detecting result. The first indicator sends a message according to the detecting result.Type: ApplicationFiled: June 30, 2017Publication date: November 22, 2018Applicant: CYBER POWER SYSTEMS, INC.Inventors: YU-SHENG WANG, HONG-LUN WANG, CHENG-YANG SU
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Publication number: 20180337553Abstract: A adapter having an inputting terminal and an outputting terminal is provided. The adapter further includes a converter having a first side and a second side, a testing switch having a first terminal and a second terminal, a detecting circuit and a first indicator. The first side is coupled to the inputting terminal. The second side is coupled to the outputting terminal. The converter is used to convert inputting power for providing outputting power to a load system. The first terminal is coupled to the second side. The detecting circuit is coupled to the second terminal. When the first terminal and the second terminal of the testing switch are conducted, the load system is disconnected with the adapter by the detecting circuit. The detecting circuit is used to detect an outputting signal for generating a detecting result. The first indicator sends a message according to the detecting result.Type: ApplicationFiled: June 30, 2017Publication date: November 22, 2018Applicant: CYBER POWER SYSTEMS, INC.Inventors: YU-SHENG WANG, HONG-LUN WANG, CHENG-YANG SU
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Patent number: 9941804Abstract: A power supply system having an adapter and a converter is provided. The adapter includes a first inputting terminal coupled to a first power and a first outputting terminal coupled to a first loading device. The converter includes a detecting controller, a second inputting terminal coupled to the detecting controller, a second outputting terminal, and a third outputting terminal. The second outputting terminal and the third outputting terminal are coupled in parallel to the detecting controller. The third outputting terminal is coupled to the position between the first inputting terminal and the first outputting terminal of the adapter through external connection. The second inputting terminal is coupled to a second power, and a second loading device is coupled to the second outputting terminal. The detecting controller drives the second power supply to the first loading device according to the power supply status of the first power.Type: GrantFiled: June 30, 2017Date of Patent: April 10, 2018Assignee: CYBER POWER SYSTEMS, INC.Inventors: Pei-Yung Lin, Hong-Lun Wang, Cheng-Yang Su