Patents by Inventor Cheng-Yeh Tsai

Cheng-Yeh Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240150073
    Abstract: A tray includes a bottom plate, a surrounding wall, and limit blocks. The surrounding wall surrounds a periphery of the bottom plate. A plurality of protrusions are arranged on an inner side of the surrounding wall. The limit blocks are separably assembled on the bottom plate. Each of the limit blocks has a limit groove and a limit portion. The limit groove is adapted to be clamped with one of the protrusions. The limit portion is positioned on an opposite side of the limit groove. In this way, the tray may correspond to plates of different sizes via the limit blocks.
    Type: Application
    Filed: February 8, 2023
    Publication date: May 9, 2024
    Inventors: Ming Chin Tsai, Cheng Yeh Tsai
  • Publication number: 20240021594
    Abstract: A micro LED display device includes a carrier, a first light-emitting unit, a first transparent substrate, a second light-emitting unit and a dichroic filtering layer. The first light-emitting unit is disposed on the carrier and is used to emit a first color light. The first transparent substrate is disposed on the first light-emitting unit. The second light-emitting unit is disposed on the first transparent substrate and is used to emit a second color light. The dichroic filtering layer is disposed between the first light-emitting unit and the first transparent substrate. The dichroic filtering layer is used to allow the first color light to pass therethrough and block the second color light.
    Type: Application
    Filed: December 28, 2022
    Publication date: January 18, 2024
    Inventors: Hung-Yin CHEN, Cheng-Yeh TSAI
  • Publication number: 20240006575
    Abstract: A light emitting device including a substrate, a first pad, a second pad, a light emitting diode, a first connection structure, a second connection structure, and a patterned adhesive layer and a method for manufacturing the same are provided. The first pad and the second pad are located on the substrate. The light emitting diode includes a first semiconductor layer, a second semiconductor layer overlapping the first semiconductor layer, a first electrode and a second electrode. The first electrode and the second electrode are respectively connected to the first semiconductor layer and the second semiconductor layer. The first connection structure electrically connects the first electrode to the first pad. The second connection structure electrically connects the second electrode to the second pad. The patterned adhesive layer is located between the substrate and the light emitting diode and does not contact the first connection structure and the second connection structure.
    Type: Application
    Filed: September 20, 2023
    Publication date: January 4, 2024
    Applicant: AUO Corporation
    Inventors: Fang-Cheng Yu, Cheng-Chieh Chang, Cheng-Yeh Tsai
  • Patent number: 11804583
    Abstract: A light emitting device including a substrate, a first pad, a second pad, a light emitting diode, a first connection structure, a second connection structure, and a patterned adhesive layer and a method for manufacturing the same are provided. The first pad and the second pad are located on the substrate. The light emitting diode includes a first semiconductor layer, a second semiconductor layer overlapping the first semiconductor layer, a first electrode and a second electrode. The first electrode and the second electrode are respectively connected to the first semiconductor layer and the second semiconductor layer. The first connection structure electrically connects the first electrode to the first pad. The second connection structure electrically connects the second electrode to the second pad. The patterned adhesive layer is located between the substrate and the light emitting diode and does not contact the first connection structure and the second connection structure.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: October 31, 2023
    Assignee: Au Optronics Corporation
    Inventors: Fang-Cheng Yu, Cheng-Chieh Chang, Cheng-Yeh Tsai
  • Patent number: 11784293
    Abstract: The display panel includes an array substrate, a light emitting diode and a first connection electrode. The array substrate includes a driving circuit layer. The light emitting diode is disposed on the array substrate. The light emitting diode includes a first semiconductor layer, a second semiconductor layer and a light emitting layer. The light emitting layer is disposed between the first semiconductor layer and the second semiconductor layer. The first connection electrode is electrically connected to the driving circuit layer and the first semiconductor layer. The first connection electrode wraps the light emitting layer such that a normal projection of the light emitting layer over the array substrate is within a normal projection of the first connection electrode over the array substrate.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: October 10, 2023
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Wen-Wei Yang, Cheng-Yeh Tsai
  • Publication number: 20230069739
    Abstract: A display device includes a circuit substrate, multiple light-emitting elements, a color conversion layer, and a bank. The light-emitting elements are disposed on and electrically connected to the circuit substrate, respectively. The color conversion layer is disposed on a first light-emitting element of the light-emitting elements. The bank is disposed between the light-emitting elements. There is a gap between the bank and the color conversion layer. A manufacturing method of a display device is also provided.
    Type: Application
    Filed: October 27, 2021
    Publication date: March 2, 2023
    Applicant: Au Optronics Corporation
    Inventors: Pu-Jung Huang, Cheng-Yeh Tsai
  • Patent number: 11322670
    Abstract: A pixel array substrate has a plurality of sub-pixel regions, wherein a pixel structure of an individual sub-pixel region includes a first signal line, a second signal line, a first contact pad, a second contact pad, a light-emitting diode, a first conductive structure, and a flux structure layer. The first contact pad and the second contact pad are respectively electrically connected with the first signal line and the second signal line. The light-emitting diode is disposed on the first contact pad. A portion of the first conductive structure is disposed between the first contact pad and a first electrode of the light-emitting diode. The flux structure layer partially surrounds the first conductive structure and the light-emitting diode. A top portion of the flux structure layer is higher than a top surface of the first electrode and is lower than a bottom surface of a light-emitting layer of the light-emitting diode.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: May 3, 2022
    Assignee: Au Optronics Corporation
    Inventors: Fang-Cheng Yu, Cheng-Yeh Tsai
  • Publication number: 20210391516
    Abstract: A light emitting device including a substrate, a first pad, a second pad, a light emitting diode, a first connection structure, a second connection structure, and a patterned adhesive layer and a method for manufacturing the same are provided. The first pad and the second pad are located on the substrate. The light emitting diode includes a first semiconductor layer, a second semiconductor layer overlapping the first semiconductor layer, a first electrode and a second electrode. The first electrode and the second electrode are respectively connected to the first semiconductor layer and the second semiconductor layer. The first connection structure electrically connects the first electrode to the first pad. The second connection structure electrically connects the second electrode to the second pad. The patterned adhesive layer is located between the substrate and the light emitting diode and does not contact the first connection structure and the second connection structure.
    Type: Application
    Filed: November 20, 2020
    Publication date: December 16, 2021
    Applicant: Au Optronics Corporation
    Inventors: Fang-Cheng Yu, Cheng-Chieh Chang, Cheng-Yeh Tsai
  • Publication number: 20210384379
    Abstract: A display panel including a substrate, a light-emitting device, a light-shielding layer, and a light-guide pillar is provided. The light-emitting device is disposed on the substrate. The light-shielding layer is disposed on the substrate and has a sidewall surrounding an opening. The light-guide pillar is disposed between the substrate and the light-emitting device and located in the opening. A gap exists between the light-guide pillar and the sidewall of the light-shielding layer.
    Type: Application
    Filed: June 4, 2021
    Publication date: December 9, 2021
    Applicant: Au Optronics Corporation
    Inventors: Fang-Cheng Yu, Wen-Wei Yang, Cheng-Yeh Tsai
  • Publication number: 20210384392
    Abstract: The display panel includes an array substrate, a light emitting diode and a first connection electrode. The array substrate includes a driving circuit layer. The light emitting diode is disposed on the array substrate. The light emitting diode includes a first semiconductor layer, a second semiconductor layer and a light emitting layer. The light emitting layer is disposed between the first semiconductor layer and the second semiconductor layer. The first connection electrode is electrically connected to the driving circuit layer and the first semiconductor layer. The first connection electrode wraps the light emitting layer such that a normal projection of the light emitting layer over the array substrate is within a normal projection of the first connection electrode over the array substrate.
    Type: Application
    Filed: April 28, 2021
    Publication date: December 9, 2021
    Inventors: Wen-Wei YANG, Cheng-Yeh TSAI
  • Patent number: 10978496
    Abstract: A pixel array substrate and a driving method of a pixel array substrate are provided. The pixel array substrate includes a substrate, at least one pixel structure located on the substrate and a liquid crystal layer. The at least one pixel structure includes a micro light emitting diode (?LED), a supporting wall, a first bottom electrode located between the supporting wall and the ?LED, and a first top electrode disposed on the supporting wall and separated from the first bottom electrode. The ?LED includes a first electrode, a first semiconductor layer electrically connected to the first electrode, a second semiconductor layer, a light-emitting layer located between the first semiconductor layer and the second semiconductor layer, and a second electrode electrically connected to the second semiconductor layer. The liquid crystal layer is disposed on the first bottom electrode and located between the supporting wall and the ?LED.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: April 13, 2021
    Assignee: Au Optronics Corporation
    Inventors: Fang-Cheng Yu, Chen-Chang Chen, Tzu-Yi Tsao, Pin-Miao Liu, Cheng-Yeh Tsai
  • Patent number: 10957718
    Abstract: A pixel structure including a first light-emitting diode element, a second light-emitting diode element and a first interconnection pattern is provided. The first interconnection pattern is disposed on and electrically connected to a first electrode of the first light-emitting diode element and a first electrode of the second light-emitting diode element. The first interconnection pattern is configured to be electrically connected to a drive element. The first interconnection pattern includes a first main portion and a second main portion. The first main portion extending in a first direction is disposed on the first electrode of the first light-emitting diode element. The second main portion extending in a second direction and connected to the first main portion is disposed on the first electrode of the second light-emitting diode element. The first direction and the second direction are crossed.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: March 23, 2021
    Assignee: Au Optronics Corporation
    Inventors: Pu-Jung Huang, Pin-Miao Liu, Cheng-Yeh Tsai
  • Publication number: 20210013389
    Abstract: A pixel array substrate has a plurality of sub-pixel regions, wherein a pixel structure of an individual sub-pixel region includes a first signal line, a second signal line, a first contact pad, a second contact pad, a light-emitting diode, a first conductive structure, and a flux structure layer. The first contact pad and the second contact pad are respectively electrically connected with the first signal line and the second signal line. The light-emitting diode is disposed on the first contact pad. A portion of the first conductive structure is disposed between the first contact pad and a first electrode of the light-emitting diode. The flux structure layer partially surrounds the first conductive structure and the light-emitting diode. A top portion of the flux structure layer is higher than a top surface of the first electrode and is lower than a bottom surface of a light-emitting layer of the light-emitting diode.
    Type: Application
    Filed: September 29, 2020
    Publication date: January 14, 2021
    Applicant: Au Optronics Corporation
    Inventors: Fang-Cheng Yu, Cheng-Yeh Tsai
  • Patent number: 10861882
    Abstract: A pixel structure includes a first TFT, an adhesive layer, an LED, and a detection conductive layer. The first TFT is coupled to a conductive layer and is configured to transmit display data to the conductive layer. The adhesive layer covers the conductive layer. The LED is disposed on the adhesive layer. The detection conductive layer is disposed on the adhesive layer, and the detection conductive layer, the adhesive layer, and the conductive layer constitute a detection capacitor. Here, a thickness of the detection conductive layer is equal to or slightly greater than a height of the LED.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: December 8, 2020
    Assignee: Au Optronics Corporation
    Inventors: Mao-Hsun Cheng, Chia-Che Hung, Yung-Chih Chen, Cheng-Yeh Tsai, Cheng-Han Huang, Chen-Chi Lin
  • Patent number: 10811580
    Abstract: A pixel array substrate has a plurality of sub-pixel regions, wherein a pixel structure of an individual sub-pixel region includes a first signal line, a second signal line, a first contact pad, a second contact pad, a light-emitting diode, a first conductive structure, and a flux structure layer. The first contact pad and the second contact pad are respectively electrically connected with the first signal line and the second signal line. The light-emitting diode is disposed on the first contact pad. A portion of the first conductive structure is disposed between the first contact pad and a first electrode of the light-emitting diode. The flux structure layer partially surrounds the first conductive structure and the light-emitting diode. A top portion of the flux structure layer is higher than a top surface of the first electrode and is lower than a bottom surface of a light-emitting layer of the light-emitting diode.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: October 20, 2020
    Assignee: Au Optronics Corporation
    Inventors: Fang-Cheng Yu, Cheng-Yeh Tsai
  • Patent number: 10790414
    Abstract: A light emitting diode includes an N-type semiconductor layer, a P-type semiconductor layer, and a light emitting layer. The P-type semiconductor layer is located on the N-type semiconductor layer. The light emitting layer is located between the N-type semiconductor layer and the P-type semiconductor layer. The N-type semiconductor layer has a first region and a second region connected to each other. The first region is overlapped with the light emitting layer and the P-type semiconductor layer in a first direction. The second region is not overlapped with the light emitting layer and the P-type semiconductor layer in the first direction. A sheet resistance of the P-type semiconductor layer is smaller than a sheet resistance of the N-type semiconductor layer.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: September 29, 2020
    Assignee: Au Optronics Corporation
    Inventors: Pu-Jung Huang, Pin-Miao Liu, Cheng-Yeh Tsai, Chen-Chi Lin
  • Patent number: 10784426
    Abstract: A device substrate includes a receiving substrate, a micro light emitting element, a first wire, and a second wire is provided. The micro light emitting element is disposed on the receiving substrate. The micro light emitting element includes a first type semiconductor layer and a second type semiconductor layer. The first type semiconductor layer is disposed on the receiving substrate and has a first wire connecting surface away from the receiving substrate. The second type semiconductor layer is disposed on a part of the first type semiconductor layer and has a second wire connection surface away from the receiving substrate. The first wire is disposed on the first wire connection surface. The second wire is disposed on the second wire connection surface. A projection range of the first wire perpendicularly projected on the micro light emitting element and a projection range of the second wire perpendicularly projected on the micro light emitting element are at least partially overlap.
    Type: Grant
    Filed: May 27, 2019
    Date of Patent: September 22, 2020
    Assignee: Au Optronics Corporation
    Inventors: Wen-Wei Yang, Cheng-Chieh Chang, Cheng-Yeh Tsai
  • Patent number: 10768499
    Abstract: A display device includes a first substrate, a second substrate, a first liquid crystal display medium, and a first electric field applying component. The first electric field applying component is configured to apply a first electric field to a first portion of the first liquid crystal display medium and apply a second electric field to a second portion of the first liquid crystal display medium. The intensity of the first electrical field is operatively different from that of the second electrical field.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: September 8, 2020
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Fang-Cheng Yu, Tzu-Yi Tsao, Pu-Jung Huang, Cheng-Yeh Tsai
  • Publication number: 20200185415
    Abstract: A pixel structure including a first light-emitting diode element, a second light-emitting diode element and a first interconnection pattern is provided. The first interconnection pattern is disposed on and electrically connected to a first electrode of the first light-emitting diode element and a first electrode of the second light-emitting diode element. The first interconnection pattern is configured to be electrically connected to a drive element. The first interconnection pattern includes a first main portion and a second main portion. The first main portion extending in a first direction is disposed on the first electrode of the first light-emitting diode element. The second main portion extending in a second direction and connected to the first main portion is disposed on the first electrode of the second light-emitting diode element. The first direction and the second direction are crossed.
    Type: Application
    Filed: October 7, 2019
    Publication date: June 11, 2020
    Applicant: Au Optronics Corporation
    Inventors: Pu-Jung Huang, Pin-Miao Liu, Cheng-Yeh Tsai
  • Publication number: 20200144469
    Abstract: A device substrate includes a receiving substrate, a micro light emitting element, a first wire, and a second wire is provided. The micro light emitting element is disposed on the receiving substrate. The micro light emitting element includes a first type semiconductor layer and a second type semiconductor layer. The first type semiconductor layer is disposed on the receiving substrate and has a first wire connecting surface away from the receiving substrate. The second type semiconductor layer is disposed on a part of the first type semiconductor layer and has a second wire connection surface away from the receiving substrate. The first wire is disposed on the first wire connection surface. The second wire is disposed on the second wire connection surface. A projection range of the first wire perpendicularly projected on the micro light emitting element and a projection range of the second wire perpendicularly projected on the micro light emitting element are at least partially overlap.
    Type: Application
    Filed: May 27, 2019
    Publication date: May 7, 2020
    Applicant: Au Optronics Corporation
    Inventors: Wen-Wei Yang, Cheng-Chieh Chang, Cheng-Yeh Tsai