Abstract: A method for detecting workpiece based on homogeneous multi-core architecture is illustrate. The method comprises: obtaining detecting images of detecting workpieces; identifying detecting areas of the detecting workpieces in the detecting images; dividing the preset rotation angle to obtain the rotation accuracy and initial rotation angles; based on each of the initial rotation angles, rotating the detecting areas to obtain a rotation area of each of the initial rotation angles; calculating similarity values between each of the rotation areas and a preset qualified area, and determining a largest similarity value as the target similarity value; and when the rotation accuracy is greater than or equal to a preset accuracy, identifying whether the detecting workpiece is a qualified workpiece according to the target similarity value and a preset similarity threshold.

Abstract: A hybrid power conversion circuit includes a high-side switch, a low-side switch, a transformer, a resonance tank, a first switch, a second switch, a first synchronous rectification switch, a second synchronous rectification switch, and a third switch. The resonance tank has an external inductor, an external capacitance, and an internal inductor. The first switch is connected to the external inductor. The second switch and a first capacitance form a series-connected path, and is connected to the external capacitance. The first and second synchronous rectification switches are respectively coupled to a first winding and a second winding. The third switch is connected to the second synchronous rectification switch. When an output voltage is less than a voltage interval, the hybrid power conversion circuit operates in a hybrid flyback conversion mode, and otherwise the hybrid power conversion circuit operates in a resonance conversion mode.

Abstract: A method for production analysis includes: receiving production data at a processor from a plurality of tools spatially arranged within a manufacturing facility; creating a hierarchal topology of the data in the processor, wherein each level of the hierarchal topology is based on a different one of a plurality of static parameters that are selected from a list consisting of: a tool identifier, a batch identifier, and a spatial orientation; displaying, at a user interface implemented by the processor, a first analysis of a first level of the hierarchal topology, wherein the analysis contains parameters related to other levels of the hierarchal topology; receiving, via the user interface, a selection by a user of a first parameter displayed on the first analysis; and updating the user interface to display a second analysis of a second level of the hierarchal topology that is related to the first parameter.

Abstract: A semiconductor memory device includes a substrate having a conductor region thereon, an interlayer dielectric layer on the substrate, and a conductive via electrically connected to the conductor region. The conductive via has a lower portion embedded in the interlayer dielectric layer and an upper portion protruding from a top surface of the interlayer dielectric layer. The upper portion has a rounded top surface. A storage structure conformally covers the rounded top surface.

Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.

Abstract: In some embodiments, the present disclosure relates to a wafer edge trimming apparatus that includes a processing chamber defined by chamber housing. Within the processing chamber is a wafer chuck configured to hold onto a wafer structure. Further, a blade is arranged near an edge of the wafer chuck and configured to remove an edge potion of the wafer structure and to define a new sidewall of the wafer structure. A laser sensor apparatus is configured to direct a laser beam directed toward a top surface of the wafer chuck. The laser sensor apparatus is configured to measure a parameter of an analysis area of the wafer structure. Control circuitry is to the laser sensor apparatus and the blade. The control circuitry is configured to start a damage prevention process when the parameter deviates from a predetermined threshold value by at least a predetermined shift value.

Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.

Abstract: A fin field effect transistor (FinFET) device structure is provided. The FinFET device structure includes a plurality of fin structures above a substrate, an isolation structure over the substrate and between the fin structures, and a gate structure formed over the fin structure. The FinFET device structure includes a source/drain (S/D) structure over the fin structure, and the S/D structure is adjacent to the gate structure. The FinFET device structure also includes a metal silicide layer over the S/D structure, and the metal silicide layer is in contact with the isolation structure.

Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.

Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.

Abstract: A method for manufacturing a package structure includes providing a carrier board; providing at least one die having a top surface, a bottom surface, and a side surface on the carrier board; and forming a protective layer to cover at least a portion of the side surface of the die. The die includes a substrate, a semiconductor layer, a gate structure, a source structure and a drain structure, at least one dielectric layer, and at least one pad. The semiconductor layer is disposed on the substrate. The gate structure is disposed on the semiconductor layer. The source and the drain structures are disposed on opposite sides of the gate structure. The dielectric layer covers the gate, source, and drain structures. The pad is disposed on the dielectric layer and penetrates through the dielectric layer to electrically contact with the gate, source or drain structure.

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.

Abstract: Microwave photonic devices use light to carry and process microwave signals over a photonic link. Light can be used as a stimulus to microwave devices that directly control microwave signals. Previous optically controlled devices suffer from large footprint, high optical power level required for switching, lack of scalability and complex integration requirements, restricting their implementation in practical microwave systems. Disclosed are monolithic optically reconfigurable integrated microwave switches (MORIMSs) built on a CMOS compatible silicon photonic chip. The disclosed scalable micrometer-scale switches provide higher switching efficiency and operate using optical power that is orders of magnitude lower than previous devices. The disclosed devices and techniques provide examples of silicon photonic platforms integrating microwave circuitry.

Abstract: A power supply system is provided. The power supply system includes a power supply, a main load unit, a DC-DC voltage conversion unit, a bypass unit, and at least one sub-load unit. The power supply is configured to provide an adjustable supply voltage. The main load unit is electrically connected to the power supply for receiving the supply voltage. The DC-DC voltage conversion unit is electrically connected to the power supply. The bypass unit is electrically connected to the power supply. The at least one sub-load unit is electrically connected to the DC-DC voltage conversion unit and the bypass unit. When the main load unit stops operating, the power supply adjusts the supply voltage and provides the adjusted supply voltage to the sub-load unit through the bypass unit.

Abstract: A semiconductor memory device includes a substrate having a conductor region thereon, an interlayer dielectric layer on the substrate, and a conductive via electrically connected to the conductor region. The conductive via has a lower portion embedded in the interlayer dielectric layer and an upper portion protruding from a top surface of the interlayer dielectric layer. The upper portion has a rounded top surface. A storage structure conformally covers the rounded top surface.

Abstract: A connector is disclosed and includes a housing base, a conductive terminal, a signal terminal and a protrusion. A sleeve of an electronic device end sleeves on the housing base through an opening end along a first direction and slides a first displacement distance, plural contact pins of the electronic device end slide into the accommodation space through the opening end, and a conductive contact pin of the electronic device end is interfered with the conductive terminal to form an electrical connection. The protrusion is elastically connected to the housing base and penetrates through the housing base. When the sleeve passes through the opening end and slides a second displacement distance greater than the first displacement distance, the protrusion is interfered with the sleeve and drives the signal terminal, so that the signal terminal pushes against a signal contact pin of the electronic device end to form an electrical connection.

Abstract: A connector is disclosed and includes a main body, a sleeving component, a conductive terminal and a signal terminal. The main body has an opening end and a sleeved end opposite to each other. An electronic device end is matched with the connector through the opening end. The sleeving component is slidably disposed on the sleeved end, and includes a conductive contact portion and a signal contact portion arranged in parallel. The conductive terminal is fixed to the main body for connecting with the conductive contact portion. The signal terminal is fixed to the main body for connecting with the signal contact portion. When the connector is detached from the electronic device end, the sleeving component is displaced relative to the main body, the signal contact portion is separated from the signal terminal, and the conductive terminal end and the conductive contact portion are maintained in an electrical connection.

Abstract: A hybrid power conversion circuit includes a high-side switch, a low-side switch, a transformer, a resonance tank, a first switch, a second switch, a first synchronous rectification switch, a second synchronous rectification switch, and a third switch. The resonance tank has an external inductor, an external capacitance, and an internal inductor. The first switch is connected to the external inductor. The second switch and a first capacitance form a series-connected path, and is connected to the external capacitance. The first and second synchronous rectification switches are respectively coupled to a first winding and a second winding. The third switch is connected to the second synchronous rectification switch. When an output voltage is less than a voltage interval, the hybrid power conversion circuit operates in a hybrid flyback conversion mode, and otherwise the hybrid power conversion circuit operates in a resonance conversion mode.

Abstract: The present disclosure provides a DC motor driving system including a DC motor, a power supply device, a switch circuit, and a microprocessor. The power supply device provides an input electrical energy. The switch circuit receives the input electrical energy and outputs a motor electrical energy, which includes a motor power and a motor voltage, to the DC motor. The DC motor driving system switchably works in a constant-voltage mode, a first variable-voltage mode, or a second variable-voltage mode. In the constant-voltage mode, the input electrical energy remains unchanged. In the first variable-voltage mode, the microprocessor controls the power supply device to adjust the input electrical energy for increasing the motor voltage and the motor power. In the second variable-voltage mode, the microprocessor controls the power supply device to adjust the input electrical energy for decreasing the motor voltage and keeping the motor power unchanged.

Abstract: An adapter with power delivery function includes a power transmission module, a first input connector, and an output connector. The power transmission module includes a bidirectional DC charging and discharging circuit, a bypass circuit, and a control circuit. The control circuit is coupled to the bidirectional DC charging and discharging circuit and the bypass circuit. The first input connector is coupled to the bidirectional DC charging and discharging circuit, the bypass circuit, and the control circuit. The first input connector includes a high voltage level pin, a low voltage level pin, and an identification pin. The output pin is coupled to the bidirectional DC charging and discharging circuit and the bypass circuit. The present disclosure further provides an electric vehicle and a wire with power delivery function.