Abstract: In one exemplary implementation, an electronic apparatus includes: a reference clock source, for generating a reference clock; a global navigation satellite system (GNSS) receiver for receiving satellites signals and the reference clock, comprising: a monitoring circuit, for monitoring a status of the GNSS receiver to generate a monitoring result; and a compensating circuit, coupled to the reference clock source and the monitoring circuit, for compensating the reference clock according to the monitoring result.

Abstract: A satellite receiver for receiving at least a target satellite signal includes a channel selection filter and a controller. The channel selection filter is provided with a plurality of channel selection settings conforming to characteristics of a plurality of satellite signals corresponding to different satellite systems, wherein each of the channel selection settings is to receive at least one of the satellite signals. The controller controls the channel selection filter to enable a target channel selection setting selected from the channel selection settings to thereby receive at least the target satellite signal.

Abstract: In one exemplary implementation, an electronic apparatus includes: a reference clock source, for generating a reference clock; a global navigation satellite system (GNSS) receiver for receiving satellites signals and the reference clock, comprising: a monitoring circuit, for monitoring a status of the GNSS receiver to generate a monitoring result; and a compensating circuit, coupled to the reference clock source and the monitoring circuit, for compensating the reference clock according to the monitoring result.

Abstract: A satellite receiver for receiving at least a target satellite signal includes a channel selection filter and a controller. The channel selection filter is provided with a plurality of channel selection settings conforming to characteristics of a plurality of satellite signals corresponding to different satellite systems, wherein each of the channel selection settings is to receive at least one of the satellite signals. The controller controls the channel selection filter to enable a target channel selection setting selected from the channel selection settings to thereby receive at least the target satellite signal.

Abstract: In one exemplary implementation, an electronic apparatus has a reference clock source for generating a reference clock, a monitoring circuit for monitoring a non-temperature factor indicative of frequency drift occurrence of the reference clock to thereby generate a monitoring result, and a compensating circuit for compensating the reference clock according to the monitoring result. In another exemplary implementation, an electronic apparatus has a reference clock source for generating a reference clock, a processing logic for performing a designated operation according to the reference clock, a monitoring circuit for monitoring a non-temperature factor indicative of frequency drift occurrence of the reference clock to thereby generate a monitoring result, and a compensating circuit for compensating the designated operation according to the monitoring result.

Abstract: An antenna switching system for switching between a first antenna and a second antenna, where a gain of the first antenna is different from a gain of the second antenna, is disclosed. The antenna switching system includes an antenna switch unit and a switch control device. The antenna switch unit is selectively coupled to the first antenna or the second antenna. The switch control device is coupled to the antenna switch unit and utilized for controlling the antenna switch unit to switch between the first antenna and the second antenna according to at least a predetermined threshold value and an incoming wireless signal received from the antenna switch unit to achieve some purposes such as reducing power consumption and anti-jamming.

Abstract: A circuit structure includes a circuit board, a first circuit component mounted on the circuit board, and a second circuit component mounted on the circuit board. The first circuit board has a first ground plane layout including at least one ground plane, and a second ground plane layout including at least one ground plane, where the first ground plane layout is not electrically connected to the second ground plane layout within the circuit board. The first circuit component is electrically connected to the first ground plane layout, and the second circuit component is electrically connected to the second ground plane layout.