Patents by Inventor Cheng Yin
Cheng Yin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145596Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.Type: ApplicationFiled: January 2, 2024Publication date: May 2, 2024Inventors: Su-Hao Liu, Kuo-Ju Chen, Kai-Hsuan Lee, I-Hsieh Wong, Cheng-Yu Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo, Syun-Ming Jang, Meng-Han Chou
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Publication number: 20240145398Abstract: A carrier structure is provided, in which at least one positioning area is defined on a chip-placement area of a package substrate, and at least one alignment portion is disposed on the positioning area. Therefore, the precision of manufacturing the alignment portion is improved by disposing the positioning area on the chip-placement area, such that the carrier structure can provide a better alignment mechanism for the chip placement operation.Type: ApplicationFiled: December 8, 2022Publication date: May 2, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Cheng-Liang HSU, Wan-Rou CHEN, Hsin-Yin CHANG, Tsung-Li LIN, Hsiu-Jung LI, Chiu-Lien LI, Fu-Quan XU, Yi-Wen LIU, Chih-Chieh SUN
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Publication number: 20240140937Abstract: Compounds of Formula I that inhibit the activity of the diacylglycerol acyltransferase 2 (DGAT2) and their uses in the treatment of diseases linked thereto in animals are described herein.Type: ApplicationFiled: November 28, 2023Publication date: May 2, 2024Applicant: Pfizer Inc.Inventors: Markus Boehm, Shawn Cabral, Matthew S. Dowling, Kentaro Futatsugi, Kim Huard, Esther Cheng Yin Lee, Allyn T. Londregan, Jana Polivkova, David A. Price, Qifang Li
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Publication number: 20240137400Abstract: A media item to be provided to users of a platform is identified. The media item is associated with a media class of one or more media classes. An indication of the media item is provided as input to a machine learning model trained based on historical encoding data to predict, for a given media item, a set of encoder parameter settings that satisfy a performance criterion in view of a respective media class of the given media item. The historical encoding data includes a prior set of encoder parameter settings that satisfied the performance criterion with respect to a prior media item associated with the respective class. Encoder parameter settings that satisfy the performance criterion in view of the media class is determined based on an output of the model. The media item is caused to be encoded using the determined encoder parameter settings.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Inventors: Ching Yin Derek Pang, Kyrah Felder, Akshay Gadde, Paul Wilkins, Cheng Chen, Yao-Chung Lin
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Publication number: 20240137506Abstract: The present disclosure provides systems and methods for image filtering. The method may include obtaining an initial image block from a reconstructed image; determining at least one candidate image block by performing a filtering operation on the initial image block using at least one trained machine learning model; and determining a target image block based on the at least one candidate image block.Type: ApplicationFiled: December 28, 2023Publication date: April 25, 2024Applicant: ZHEJIANG DAHUA TECHNOLOGY CO., LTD.Inventors: Xue ZHANG, Cheng FANG, Dong JIANG, Jucai LIN, Jun YIN
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Publication number: 20240127000Abstract: A computer-implemented method is provided for model training performed by a processing system. The method comprises determining a set of first weights based on a first matrix associated with a source model, determining a set of second weights based on the set of first weights, forming a second matrix associated with a target model based on the set of first weights and the set of second weights, initializing the target model based on the second matrix, and training the target model.Type: ApplicationFiled: September 30, 2022Publication date: April 18, 2024Inventors: Yichun Yin, Lifeng Shang, Cheng Chen, Xin Jiang, Xiao Chen, Qun Liu
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Patent number: 11958789Abstract: A method for determining a consistency coefficient of a power-law cement grout includes: determining a water-cement ratio of the power-law cement grout; according to engineering practice requirements, determining a time required to determine the consistency coefficient of the power-law cement grout; and obtaining the consistency coefficient of the power-law cement grout. The method is accurate and reliable, requires less calculation, etc.; and has very high practical value and popularization value in environmental protection and ecological restoration.Type: GrantFiled: December 12, 2023Date of Patent: April 16, 2024Assignee: KUNMING UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Zhi-quan Yang, Jun-fan Xiong, Ying-yan Zhu, Yi Yang, Yong-shun Han, Muhammad Asif Khan, Jian-bin Xie, Tian-bing Xiang, Bi-hua Zhang, Han-hua Xu, Jie Zhang, Shen-zhang Liu, Qi-jun Jia, Cheng-yin Ye, Gang Li
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Publication number: 20240119323Abstract: One or more embodiments of the present description provide a method and device for risk prediction of thermal runaway in LIB. The method includes: acquiring knowledge of a mechanism for thermal runaway in LIB; describing an evolution process of thermal runaway in LIB by adopting a fault tree; mapping a fault tree structure to a dynamic Bayesian network model for thermal runaway in LIB to obtain quantitative results of a risk of thermal runaway in LIB; and taking the quantitative results of a dynamic Bayesian network as inputs of a machine learning model to obtain prediction results of the risk of thermal runaway. By using the method in the present embodiment, an evolution trend of battery thermal runaway can be predicted by fusing multiple thermal runaway causes and multi-source data, and thus, the prediction results are relatively accurate.Type: ApplicationFiled: May 17, 2023Publication date: April 11, 2024Applicant: Beijing Institute of TechnologyInventors: Huixing MENG, Qiaoqiao YANG, Zhiming YIN, Cheng WANG, Te HAN, Jinduo XING
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Publication number: 20240113575Abstract: A hybrid permanent magnet motor rotor rotates around a central axis, and includes: a rotor core provided with a plurality of magnet installation slots; and a plurality of magnet parts embedded inside a plurality of magnet installation slots respectively, wherein the rotor is provided with a plurality of first magnetic pole parts and a plurality of second magnetic pole parts, the magnetic poles of the first magnetic pole part and the second magnetic pole part are arranged in opposite and alternately in the circumferential direction, and the magnetic placement of the first magnetic pole part is different from that of the second magnetic pole part, the amount of magnets used in the second magnetic pole part is greater than that used in the first magnetic pole part.Type: ApplicationFiled: August 25, 2023Publication date: April 4, 2024Inventors: Kuan YANG, Pei-Chun SHIH, Ta-Yin LUO, Guo-Jhih YAN, Sheng-Chan YEN, Cheng-Tsung LIU
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Patent number: 11935620Abstract: A memory device for memory cell programming and erasing with refreshing operation is disclosed. The memory device includes multiple location-related memory cells and a refresh module. The location-related memory cells are coupled to a bit line on which a selecting voltage is applied. The refresh module rewrites a stored data of a first cell of the location-related memory cells to the first cell of the location-related memory cells in response to an operation count being smaller than a number N. N is related to the number of the location-related memory cells.Type: GrantFiled: June 21, 2021Date of Patent: March 19, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yue-Der Chih, Cheng-Hsiung Kuo, Gu-Huan Li, Chien-Yin Liu
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Publication number: 20240069780Abstract: Disclosed are an in-memory computing architecture for a nearest neighbor search of a cosine distance and an operating method thereof. The in-memory computing architecture comprises two FeFET-based storage arrays, Translinear circuits and a WTA circuit, and the two storage arrays are a first storage array and a second storage array, respectively; wherein each of the storage cells comprises a FeFET and a resistor which are electrically connected; an input vector is inputted into the first storage array for outputting the inner product X of the input vector multiplied by all the storage vectors in the first storage array; the second storage array outputs the sum of squares Y of all vector elements in the storage vectors; the output values of the first storage array and the second storage array are respectively inputted into the Translinear circuits through current mirrors; and the Translinear circuits output X2/Y to the WTA circuit.Type: ApplicationFiled: December 13, 2022Publication date: February 29, 2024Applicant: ZHEJIANG UNIVERSITYInventors: Xunzhao YIN, Che-Kai Liu, Haobang Chen, Cheng ZHUO
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Publication number: 20240014042Abstract: A semiconductor device includes a fin, first source/drain regions, second source/drain regions, a first nanosheet, a second nanosheet and a metal gate structure. The fin extends in a first direction and protrudes above an insulator. The first source/drain regions are over the fin. The second source/drain regions are over the first source/drain regions. The first nanosheet extends in the first direction between the first source/drain regions. The second nanosheet extends in the first direction between the second source/drain regions. The metal gate structure is over the fin and between the first source/drain regions. The metal gate structure extends in a second direction different from the first direction from a first sidewall to a second sidewall. A first distance in the second direction between the first nanosheet and the first sidewall is smaller than a second distance in the second direction between the first nanosheet and the second sidewall.Type: ApplicationFiled: July 10, 2022Publication date: January 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Meng-Yu Lin, Chun-Fu Cheng, Cheng-Yin Wang, Yi-Bo Liao, Szuya Liao
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Patent number: 11866425Abstract: Compounds of Formula I that inhibit the activity of the diacylglycerol acyltransferase 2 (DGAT2) and their uses in the treatment of diseases linked thereto in animals are described herein.Type: GrantFiled: June 11, 2021Date of Patent: January 9, 2024Assignee: Pfizer Inc.Inventors: Markus Boehm, Shawn Cabral, Matthew S. Dowling, Kentaro Futatsugi, Kim Huard, Esther Cheng Yin Lee, Allyn T. Londregan, Jana Polivkova, David A. Price, Qifang Li
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Publication number: 20230399833Abstract: A flushing switch device with automatic pressing stroke detection is provided, which is applied to the flushing switches of a toilet. The flushing switch device with automatic pressing stroke detection includes a capacitive sensor, an actuator, and a protector. The capacitive sensor senses a user's hand movements to generate a sensing signal. The actuator includes a driver and a pressing mechanism; the driver drives the pressing mechanism to press one of the flushing switches. The protector includes a detector and a controller; the detector detects a load variation during an operation of the actuator to generate a detection signal; the controller receives the sensing signal and correspondingly generates a control signal to control the actuator according to the sensing signal and the detection signal.Type: ApplicationFiled: March 13, 2023Publication date: December 14, 2023Inventors: Wen-Cheng Yin, Fu-Jung Cheng, Ho-Chuan Hsu, Yu-Hsun Tseng, Chao-Chin Chang, Kai-Li Peng
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Publication number: 20230345693Abstract: An integrated circuit includes a plurality of SRAM cells. Each SRAM cell includes a first inverter having a first N-type transistor and a first P-type transistor stacked vertically in a first active region. The SRAM cell includes a second inverter cross-coupled with the first inverter and including a second N-type transistor and a second P-type transistor stacked vertically in a second active region. The SRAM cell includes a butt contact electrically connecting an output of the first inverter to an input of the second inverter. The butt contact is at least partially within a first active region.Type: ApplicationFiled: February 2, 2023Publication date: October 26, 2023Inventors: Cheng-Yin WANG, Szuya Liao, Jui-Chien Huang
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Publication number: 20230307285Abstract: A semiconductor device with isolation structures and a method of fabricating the same are disclosed. The semiconductor device includes first and second FETs, an isolation structure, and a conductive structure. The first FET includes a first fin structure, a first array of gate structures disposed on the first fin structure, and a first array of S/D regions disposed on the first fin structure. The second FET includes a second fin structure, a second array of gate structures disposed on the second fin structure, and a second array of S/D regions disposed on the second fin structure. The isolation structure includes a fill portion and a liner portion disposed between the first and second FETs and in physical contact with the first and second arrays of gate structures. The conductive structure is disposed in the liner portion and conductively coupled to a S/D region of the second array of S/D regions.Type: ApplicationFiled: August 19, 2022Publication date: September 28, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jui-Chien Huang, Sandy Szuya Liao, Cheng-Yin Wang, Wei-Cheng Lin, Wei-Chen Tzeng
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Publication number: 20230307456Abstract: An integrated circuit includes a complimentary field effect transistor (CFET). The CFET includes a first transistor having a first semiconductor nanostructure corresponding to a channel region of the first semiconductor nanostructure and a first gate metal surrounding the second semiconductor nanostructure. The CFET includes a transistor including a second semiconductor nanostructure above the first semiconductor nanostructure and a second gate metal surrounding the second semiconductor nanostructure. The CFET includes an isolation structure between the first and second semiconductor nanostructures.Type: ApplicationFiled: August 15, 2022Publication date: September 28, 2023Inventors: Meng-Yu LIN, Yi-Han WANG, Chun-Fu CHENG, Cheng-Yin WANG, Yi-Bo LIAO, Szuya LIAO
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Publication number: 20230178435Abstract: A method includes forming a first transistor of a first semiconductor device. The first semiconductor device includes a first channel region and a gate electrode on the first channel region. A second semiconductor device is bonded to the first semiconductor device by a bonding layer disposed between the first and second semiconductor devices. A second transistor of the second semiconductor device is formed that includes a second channel region and a second gate electrode on the second channel region. The bonding layer is disposed between the first gate electrode of the first transistor and the second gate electrode of the second transistor.Type: ApplicationFiled: July 8, 2022Publication date: June 8, 2023Inventors: Jui-Chien HUANG, Szuya LIAO, Cheng-Yin WANG, Shih Hao WANG
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Publication number: 20230149246Abstract: The present disclosure discloses a smart walker including a walker body, a first support member, a first sensing device, a second support member and a control device. The walker body includes a fixing member. The first support member and the second support member are connected to both ends of the fixing member, and each of the support members includes a handle, a front leg, and a rear leg. The first sensing device is disposed on a central leg to sense a surrounding environment, thereby obtaining a sensing signal. The control device includes a processor connected to the first sensing device and receives the sensing signal to determine whether an obstacle is present around the smart walker by judging the image.Type: ApplicationFiled: September 12, 2022Publication date: May 18, 2023Inventors: WEN-CHENG YIN, YU-HSUN TSENG, KAI-LI PENG
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Patent number: 11493273Abstract: A method for measuring the softening and melting performances of iron ore in blast furnace is disclosed, which is implemented by a device including a high temperature furnace, gas supply system, a loading system and a weighing system. The method includes: step 1: the dried coke and iron ore specimen are placed in the graphite crucible in a specified way; step 2: the graphite crucible is placed in the high temperature furnace, and N2 is continuously fed into the high temperature furnace to reach an airtightness requirement; step 3: a vacuum pump is used to extract mixed gas in a hearth of the high temperature furnace and heating process is started; step 4: both the composition of mixed gas and pressure imposed on the iron ore are controlled according to the designed temperature variation; step 5: data are acquired to calculate.Type: GrantFiled: July 10, 2020Date of Patent: November 8, 2022Inventors: Shengfu Zhang, Chenguang Bai, Rongjin Zhu, Cheng Yin, Qingyu Deng, Liangying Wen, Jian Xu, Jie Dang, Zhixiong You, Wenzhou Yu, Liwen Hu