Patents by Inventor Cheng-Yu Chiang

Cheng-Yu Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12111996
    Abstract: A driving apparatus and an operation method thereof are provided. The driving apparatus includes a first driving circuit and a second driving circuit. The first driving circuit suspends performing at least one of a display driving operation and a touch sensing operation during a skip period under a driving mode, and the first driving circuit performs the at least one of the display driving operation and the touch sensing operation outside the skip period under the driving mode. The second driving circuit is coupled to the first driving circuit. The second driving circuit performs a fingerprint sensing operation during the skip period.
    Type: Grant
    Filed: August 19, 2022
    Date of Patent: October 8, 2024
    Assignee: Novatek Microelectronics Corp.
    Inventors: Wei-Lun Shih, Tsen-Wei Chang, Cho-Hsuan Jhang, Chih-Peng Hsia, Cheng-Yu Chiang
  • Publication number: 20220406085
    Abstract: A driving apparatus and an operation method thereof are provided. The driving apparatus includes a first driving circuit and a second driving circuit. The first driving circuit suspends performing at least one of a display driving operation and a touch sensing operation during a skip period under a driving mode, and the first driving circuit performs the at least one of the display driving operation and the touch sensing operation outside the skip period under the driving mode. The second driving circuit is coupled to the first driving circuit. The second driving circuit performs a fingerprint sensing operation during the skip period.
    Type: Application
    Filed: August 19, 2022
    Publication date: December 22, 2022
    Applicant: Novatek Microelectronics Corp.
    Inventors: Wei-Lun Shih, Tsen-Wei Chang, Cho-Hsuan Jhang, Chih-Peng Hsia, Cheng-Yu Chiang
  • Patent number: 11423685
    Abstract: A driving apparatus and an operation method thereof are provided. The driving apparatus includes a first driving circuit and a second driving circuit. The first driving circuit performs a first driving mode on a panel. The first driving circuit performs the first driving mode during a first frame period among a plurality of frame periods and skips the first driving mode during a first skip period between the first frame period and a second frame period among the frame periods. The first driving circuit outputs timing control signal including a timing that the first driving mode is skipped. The second driving circuit is coupled to the first driving circuit to receive the timing control signal. The second driving circuit performs a fingerprint sensing operation different from the first driving mode on the panel according to the timing control signal during the first skip period.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: August 23, 2022
    Assignee: Novatek Microelectronics Corp.
    Inventors: Wei-Lun Shih, Tsen-Wei Chang, Cho-Hsuan Jhang, Chih-Peng Hsia, Cheng-Yu Chiang
  • Publication number: 20200327301
    Abstract: A driving apparatus and an operation method thereof are provided. The driving apparatus includes a first driving circuit and a second driving circuit. The first driving circuit performs a first driving mode on a panel. The first driving circuit performs the first driving mode during a first frame period among a plurality of frame periods and skips the first driving mode during a first skip period between the first frame period and a second frame period among the frame periods. The first driving circuit outputs timing control signal including a timing that the first driving mode is skipped. The second driving circuit is coupled to the first driving circuit to receive the timing control signal. The second driving circuit performs a fingerprint sensing operation different from the first driving mode on the panel according to the timing control signal during the first skip period.
    Type: Application
    Filed: April 9, 2020
    Publication date: October 15, 2020
    Applicant: Novatek Microelectronics Corp.
    Inventors: Wei-Lun Shih, Tsen-Wei Chang, Cho-Hsuan Jhang, Chih-Peng Hsia, Cheng-Yu Chiang
  • Patent number: 10199731
    Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: February 5, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Cheng-Yu Chiang
  • Patent number: 9887102
    Abstract: A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: February 6, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Tai-Tsung Hsu, Cheng-Yu Chiang, Miao-Wen Chen, Wen-Jung Chiang, Hsin-Hung Lee
  • Publication number: 20170187117
    Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
    Type: Application
    Filed: March 10, 2017
    Publication date: June 29, 2017
    Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Cheng-Yu Chiang
  • Patent number: 9627748
    Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: April 18, 2017
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Cheng-Yu Chiang
  • Publication number: 20160181126
    Abstract: A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
    Type: Application
    Filed: February 26, 2016
    Publication date: June 23, 2016
    Inventors: Tai-Tsung Hsu, Cheng-Yu Chiang, Miao-Wen Chen, Wen-Jung Chiang, Hsin-Hung Lee
  • Patent number: 9305885
    Abstract: A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: April 5, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Tai-Tsung Hsu, Cheng-Yu Chiang, Miao-Wen Chen, Wen-Jung Chiang, Hsin-Hung Lee
  • Publication number: 20150162661
    Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
    Type: Application
    Filed: January 9, 2014
    Publication date: June 11, 2015
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Cheng-Yu Chiang
  • Publication number: 20150123251
    Abstract: A semiconductor package is disclosed, which includes: a packaging structure having at least a semiconductor element; and at least three shielding layers sequentially stacked on the packaging structure so as to cover the semiconductor element, wherein a middle layer of the shielding layers is lower in electrical conductivity than adjacent shielding layers on both sides of the middle layer, thereby reducing electromagnetic interferences so as to increase the shielding effectiveness.
    Type: Application
    Filed: December 19, 2013
    Publication date: May 7, 2015
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Chih-Hsien Chiu, Chia-Yang Chen, Tsung-Hsien Tsai, Heng-Cheng Chu, Cheng-Yu Chiang
  • Patent number: 8981540
    Abstract: A package structure is disclosed, which includes: a carrier having a recessed portion formed on a lower side thereof and filled with a dielectric material; a semiconductor element disposed on an upper side of the carrier and electrically connected to the carrier; and an encapsulant formed on the upper side of the carrier for encapsulating the semiconductor element. Therein, the dielectric material is exposed from the encapsulant. As such, when the carrier is disposed on a circuit board, the dielectric material is sandwiched between the lower side of the carrier and the circuit board to form a decoupling capacitor, thereby improving the power integrity.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: March 17, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Cheng-Yu Chiang, Wen-Jung Chiang, Hsing-Hung Lee
  • Publication number: 20140231972
    Abstract: A multi-chip package structure is provided, including a substrate having a grounding structure; two semiconductor elements disposed on and electrically connected to the substrate; an encapsulant formed on the substrate and encapsulating semiconductor elements, wherein the encapsulant has a plurality of round holes formed between the semiconductor elements; and an electromagnetic shielding structure formed in each of the round holes and connected to the grounding structure to achieve electromagnetic shielding effects. A method for forming the multi-chip package is also provided.
    Type: Application
    Filed: August 6, 2013
    Publication date: August 21, 2014
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Tai-Tsung Hsu, Cheng-Yu Chiang, Miao-Wen Chen, Wen-Jung Chiang, Hsin-Hung Lee
  • Publication number: 20140225241
    Abstract: A package structure is disclosed, which includes: a carrier having a recessed portion formed on a lower side thereof and filled with a dielectric material; a semiconductor element disposed on an upper side of the carrier and electrically connected to the carrier; and an encapsulant formed on the upper side of the carrier for encapsulating the semiconductor element. Therein, the dielectric material is exposed from the encapsulant. As such, when the carrier is disposed on a circuit board, the dielectric material is sandwiched between the lower side of the carrier and the circuit board to form a decoupling capacitor, thereby improving the power integrity.
    Type: Application
    Filed: June 20, 2013
    Publication date: August 14, 2014
    Inventors: Cheng-Yu Chiang, Wen-Jung Chiang, Hsing-Hung Lee