Patents by Inventor Cheng-Yu Liu

Cheng-Yu Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250067781
    Abstract: A voltage meter includes a sampler, a gain circuit, an accumulator and a feedback circuit. The sampler samples an input signal to generate a series of first signals and a series of second signals. The gain circuit, coupled to the sampler, modifies at least one of the series of first signals and the series of second signals, to generate a series of modified first signals and a series of modified second signals. The accumulator, coupled to the gain circuit, accumulates an operational result of the series of modified first signals and the series of modified second signals, to generate an accumulation result. The feedback circuit, coupled between the accumulator and the sampler, sends a feedback signal back to the sampler according to the accumulation result.
    Type: Application
    Filed: August 24, 2023
    Publication date: February 27, 2025
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Cheng-Yu Liu, Chiao-Wei Hsiao
  • Publication number: 20240019486
    Abstract: A method includes forming a reconstructed wafer, which includes placing a plurality of package components over a carrier, forming an interconnect structure over and electrically interconnecting the plurality of package components, forming top electrical connectors over and electrically connecting to the interconnect structure, and forming alignment marks at a same level as the top electrical connectors. Probe pads in the top electrical connectors are probed, and the probing is performed using the alignment marks for aligning to the probe pads. An additional package component is bonded to the reconstructed wafer through solder regions. The solder regions are physically joined to the top electrical connectors.
    Type: Application
    Filed: January 9, 2023
    Publication date: January 18, 2024
    Inventors: Cheng-Chieh Wu, Kuo-Lung Pan, Shu-Rong Chun, Hao-Yi Tsai, Po-Yuan Teng, Mao-Yen Chang, Cheng Yu Liu, Chia-Wen Lin
  • Patent number: 11582504
    Abstract: The present invention discloses a signal output circuit applying bandwidth broadening mechanism for an image signal transmission apparatus that includes a first driving circuit and a second driving circuit. The first driving circuit includes a continuous time linear equalizer (CTLE) and is configured to receive a digital input signal to perform a high frequency enhancement thereon to increase a bandwidth of the digital input signal to generate a first output signal, in which a zero point and two poles of a frequency response of the first driving circuit are determined by circuit parameters thereof. The second driving circuit is configured to receive and amplify the first output signal to generate a second output signal for an image receiving apparatus.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: February 14, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Tsung-Ming Chen, Cheng-Yu Liu
  • Publication number: 20220272401
    Abstract: The present invention discloses a signal output circuit applying bandwidth broadening mechanism for an image signal transmission apparatus that includes a first driving circuit and a second driving circuit. The first driving circuit includes a continuous time linear equalizer (CTLE) and is configured to receive a digital input signal to perform a high frequency enhancement thereon to increase a bandwidth of the digital input signal to generate a first output signal, in which a zero point and two poles of a frequency response of the first driving circuit are determined by circuit parameters thereof. The second driving circuit is configured to receive and amplify the first output signal to generate a second output signal for an image receiving apparatus.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 25, 2022
    Inventors: TSUNG-MING CHEN, CHENG-YU LIU
  • Patent number: 11251701
    Abstract: A high voltage tolerant output circuit includes a boost circuit, a first bias circuit, and a buffer circuit. The boost circuit includes a first transistor and an output node. A first terminal of the first transistor is coupled with the output node. The first bias circuit is coupled with the output node and a control terminal of the first transistor, and for dividing the output voltage of the output node. The first bias circuit is further configured to transmit the divided output voltage to the control terminal of the first transistor. The buffer circuit is coupled with a second terminal of the first transistor, and for setting a first voltage of the second terminal of the first transistor. The output voltage is positive correlated to the first voltage, and a maximum value of the output voltage is higher than or equal to a maximum value of the first voltage.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: February 15, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chun-I Kuo, Yi-Jang Wu, Chun-Ta Ho, Cheng-Yu Liu
  • Patent number: 11223363
    Abstract: Disclosed is an open loop fractional frequency divider including an integer divider, a control circuit, and a phase interpolator. The integer divider processes an input clock according to the setting of a target frequency to generate a first frequency-divided clock and a second frequency-divided clock. The control circuit generates a coarse-tune control signal and a fine-tune control signal according to the setting. The phase interpolator generates an output clock according to the first frequency-divided clock, the second frequency-divided clock, and the two control signals. The two control signals are used for determining a first current, and their reversed signals are used for determining a second current. The phase interpolator controls a contribution of the first (second) frequency-divided clock to the generation of the output clock according to the first (second) frequency-divided clock, the reversed signal of the first (second) frequency-divided clock, and the first (second) current.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: January 11, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Shawn Min, Yi-Jang Wu, Tsung-Ming Chen, Chieh-Yuan Hsu, Cheng-Yu Liu
  • Publication number: 20210376842
    Abstract: Disclosed is an open loop fractional frequency divider including an integer divider, a control circuit, and a phase interpolator. The integer divider processes an input clock according to the setting of a target frequency to generate a first frequency-divided clock and a second frequency-divided clock. The control circuit generates a coarse-tune control signal and a fine-tune control signal according to the setting. The phase interpolator generates an output clock according to the first frequency-divided clock, the second frequency-divided clock, and the two control signals. The two control signals are used for determining a first current, and their reversed signals are used for determining a second current. The phase interpolator controls a contribution of the first (second) frequency-divided clock to the generation of the output clock according to the first (second) frequency-divided clock, the reversed signal of the first (second) frequency-divided clock, and the first (second) current.
    Type: Application
    Filed: May 21, 2021
    Publication date: December 2, 2021
    Inventors: SHAWN MIN, YI-JANG WU, TSUNG-MING CHEN, CHIEH-YUAN HSU, CHENG-YU LIU
  • Publication number: 20210265910
    Abstract: A high voltage tolerant output circuit includes a boost circuit, a first bias circuit, and a buffer circuit. The boost circuit includes a first transistor and an output node. A first terminal of the first transistor is coupled with the output node. The first bias circuit is coupled with the output node and a control terminal of the first transistor, and for dividing the output voltage of the output node. The first bias circuit is further configured to transmit the divided output voltage to the control terminal of the first transistor. The buffer circuit is coupled with a second terminal of the first transistor, and for setting a first voltage of the second terminal of the first transistor. The output voltage is positive correlated to the first voltage, and a maximum value of the output voltage is higher than or equal to a maximum value of the first voltage.
    Type: Application
    Filed: February 24, 2021
    Publication date: August 26, 2021
    Inventors: Chun-I Kuo, Yi-Jang Wu, Chun-Ta Ho, Cheng-Yu Liu
  • Patent number: 11082200
    Abstract: A clock and data recovery apparatus is provided that includes a sampling circuit, a storage circuit and a determining circuit. The sampling circuit includes sampling units each sampling a received data according to one of reference clock signals to generate a sampling result. The storage circuit includes FIFO storage units configured to store the sampling result of the received data corresponding to different time spots. The determining circuit is configured to set a certain number of received data as a reference data pattern, to adjust a starting position of a sampling window according to a transition point of sampled values within the reference data pattern when only one data transition exists therein and adjust a length of the sampling window according to an amount of high state sample points of the sampled values within the reference data pattern when more than one data transitions exist therein.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: August 3, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chieh-Shiung Chang, Chia-Jung Chang, Yu-An Chang, Cheng-Yu Liu
  • Publication number: 20210067314
    Abstract: A clock and data recovery apparatus is provided that includes a sampling circuit, a storage circuit and a determining circuit. The sampling circuit includes sampling units each sampling a received data according to one of reference clock signals to generate a sampling result. The storage circuit includes FIFO storage units configured to store the sampling result of the received data corresponding to different time spots. The determining circuit is configured to set a certain number of received data as a reference data pattern, to adjust a starting position of a sampling window according to a transition point of sampled values within the reference data pattern when only one data transition exists therein and adjust a length of the sampling window according to an amount of high state sample points of the sampled values within the reference data pattern when more than one data transitions exist therein.
    Type: Application
    Filed: August 25, 2020
    Publication date: March 4, 2021
    Inventors: Chieh-Shiung CHANG, Chia-Jung CHANG, Yu-An CHANG, Cheng-Yu LIU
  • Publication number: 20210030579
    Abstract: An arthritis correction and fixation device is used to connect distal and middle phalanges of a finger. The arthritis correction and fixation device includes a first unit, a second unit and a connection unit. The first unit connects with the distal phalange and has a first threaded portion and a first connecting portion. The second unit connects with the middle phalange and has a second threaded portion and a second connecting portion. The first connecting portion and the second connecting portion are connected through the connection unit, so that the first unit and the second unit can actuate relative to each other. When the first threaded portion is rotated, the first connecting portion drives the second unit to move together in a direction away from the first threaded portion, thereby changing a distance between the distal and middle phalanges.
    Type: Application
    Filed: July 30, 2019
    Publication date: February 4, 2021
    Inventors: Meng-Shin YEN, Cheng-Yu LIU, Chung-Ping CHUANG
  • Publication number: 20200337745
    Abstract: A hallux valgus traction device is disclosed. The hallux valgus traction device includes a first traction unit, a second traction unit and a connection unit. The first traction unit and the second traction unit wind around a first metatarsal bone and a second metatarsal bone respectively. The first traction unit and the second traction unit are connected to each other through the connection unit. When the connection unit is tightened, the connection unit brings the first traction unit and the second traction unit to approach each other, so that the first metatarsal bone and the second metatarsal bone also approach each other.
    Type: Application
    Filed: January 22, 2020
    Publication date: October 29, 2020
    Inventors: Meng-Shin YEN, Cheng-Yu LIU, Chung-Ping CHUANG
  • Patent number: 9908861
    Abstract: Methods of preparing a second high-efficiency, rhenium-promoted silver catalyst for producing alkylene oxide from an alkylene based on a first catalyst are disclosed and described. In accordance with the disclosed methods, the first and second catalysts include at least one promoter that includes a rhenium promoter. The target catalyst concentrations of one or more promoters of the at least one promoter on the second catalyst are determined based on the values of a catalyst reference property for the two catalysts and the concentration of the one or more promoters of the at least one promoter on the first catalyst. Suitable catalyst reference properties include carrier specific surface area and silver specific surface area. Reaction systems utilizing the first and second catalysts are also described.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: March 6, 2018
    Assignee: Dow Technology Investments LLC
    Inventors: Hirokazu Shibata, Arun Basrur, Srikant Gopal, Mark McAdon, Albert Cheng-Yu Liu, Liping Zhang, Ernest R. Frank
  • Publication number: 20170217915
    Abstract: Methods of preparing a second high-efficiency, rhenium-promoted silver catalyst for producing alkylene oxide from an alkylene based on a first catalyst are disclosed and described. In accordance with the disclosed methods, the first and second catalysts include at least one promoter that includes a rhenium promoter. The target catalyst concentrations of one or more promoters of the at least one promoter on the second catalyst are determined based on the values of a catalyst reference property for the two catalysts and the concentration of the one or more promoters of the at least one promoter on the first catalyst. Suitable catalyst reference properties include carrier specific surface area and silver specific surface area. Reaction systems utilizing the first and second catalysts are also described.
    Type: Application
    Filed: April 11, 2017
    Publication date: August 3, 2017
    Inventors: Hirokazu Shibata, Arun Basrur, Srikant Gopal, Mark McAdon, Albert Cheng-Yu Liu, Liping Zhang, Ernest R. Frank
  • Patent number: 9649621
    Abstract: Methods of preparing a second high-efficiency, rhenium-promoted silver catalyst for producing alkylene oxide from an alkylene based on a first catalyst are disclosed and described. In accordance with the disclosed methods, the first and second catalysts include at least one promoter that includes a rhenium promoter. The target catalyst concentrations of one or more promoters of the at least one promoter on the second catalyst are determined based on the values of a catalyst reference property for the two catalysts and the concentration of the one or more promoters of the at least one promoter on the first catalyst. Suitable catalyst reference properties include carrier specific surface area and silver specific surface area. Reaction systems utilizing the first and second catalysts are also described.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: May 16, 2017
    Assignee: Dow Technology Investments LLC
    Inventors: Hirokazu Shibata, Arun G. Basrur, Srikant Gopal, Mark H. McAdon, Albert Cheng-Yu Liu, Liping Zhang, Ernest R. Frank
  • Publication number: 20140323295
    Abstract: Methods of preparing a second high-efficiency, rhenium-promoted silver catalyst for producing alkylene oxide from an alkylene based on a first catalyst are disclosed and described. In accordance with the disclosed methods, the first and second catalysts include at least one promoter that includes a rhenium promoter. The target catalyst concentrations of one or more promoters of the at least one promoter on the second catalyst are determined based on the values of a catalyst reference property for the two catalysts and the concentration of the one or more promoters of the at least one promoter on the first catalyst. Suitable catalyst reference properties include carrier specific surface area and silver specific surface area. Reaction systems utilizing the first and second catalysts are also described.
    Type: Application
    Filed: November 30, 2012
    Publication date: October 30, 2014
    Inventors: Hirokazu Shibata, Arun G. Basrur, Srikant Gopal, Mark H. McAdon, Albert Cheng-Yu Liu, Liping Zhang, Ernest R. Frank
  • Patent number: 8572647
    Abstract: The present invention provides methods for determining which ads to present to a user. An embodiment of the method comprises identifying one or more ads, at least one of the identified ads associated with a video. For each identified ad, a first score is calculated. The first score for the identified ad associated with the video is calculated based on one or more metrics representing user interactions associated with viewing the video. In one embodiment, the score for the ad associated with the video will be better (e.g., higher) the more viewers of the video hosting service interact with the associated video, since such interactions thereby indicate a higher over level of viewer interest in the video. One or more of the identified ads are selected to be presented to the user based at least in part on the first score of each of the identified ads. The one or more selected ads are transmitted to a device for presenting to the user.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: October 29, 2013
    Assignee: Google Inc.
    Inventors: Matthew Cheng-Yu Liu, Shiva Littoo Rajaraman, Jonathan Leigh Goldman
  • Patent number: 8002432
    Abstract: This present invention discloses a desk lamp with a separable magnifier, which comprises a magnifier component and a desk lamp holder. Around the lens of the magnifier component, a plurality of illumination lamps is arranged for illumination. When the power storage module of the magnifier is exhausted, the handle of the magnifier can be inserted into the slot of the receptacle to charge. When the desk lamp is put into use, the magnifier component is combined with the receptacle as a desk lamp. The whole assembly is convenient.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: August 23, 2011
    Assignee: Far East University
    Inventors: Yu-Gang Chen, Cheng-Yu Liu
  • Publication number: 20110082029
    Abstract: An improved carrier useful for preparing a catalyst having excellent catalytic performance when used in the production of alkylene oxide, such as ethylene oxide. The carrier is obtained by a) impregnating a preformed alpha-alumina carrier with at least one modifier selected from among alkali metal silicates and alkaline earth metal silicates, b) drying the impregnated carrier; and c) calcining dried carrier. The carrier may optionally be washed, prior to being impregnated by conventional catalytic material and/or promoter material.
    Type: Application
    Filed: November 16, 2010
    Publication date: April 7, 2011
    Inventors: Erlind M. Thorsteinson, Madan M. Bhasin, Albert Cheng-Yu Liu, Juliana G. Serafin, Seyed R. Seyedmonir, Hwaili Soo
  • Publication number: 20100242060
    Abstract: The present invention provides methods for determining which ads to present to a user. An embodiment of the method comprises identifying one or more ads, at least one of the identified ads associated with a video. For each identified ad, a first score is calculated. The first score for the identified ad associated with the video is calculated based on one or more metrics representing user interactions associated with viewing the video. In one embodiment, the score for the ad associated with the video will be better (e.g., higher) the more viewers of the video hosting service interact with the associated video, since such interactions thereby indicate a higher over level of viewer interest in the video. One or more of the identified ads are selected to be presented to the user based at least in part on the first score of each of the identified ads. The one or more selected ads are transmitted to a device for presenting to the user.
    Type: Application
    Filed: March 19, 2009
    Publication date: September 23, 2010
    Applicant: GOOGLE INC.
    Inventors: Matthew Cheng-Yu Liu, Shivakumar Littoo Rajaraman, Jonathan Leigh Goldman