Abstract: An optical imaging lens assembly includes at least one optical lens element. The optical lens element includes an anti-reflective coating, and the anti-reflective coating is arranged on at least one surface of the optical lens element. The anti-reflective coating includes a high-low refractive coating and a gradient refractive coating, and the high-low refractive coating is arranged between the optical lens element and the gradient refractive coating. The high-low refractive coating includes at least one high refractive coating layer and at least one low refractive coating layer, which are stacked in alternations. The low refractive coating layer is in contact with the optical lens element. The gradient refractive coating includes a plurality of holes, and the holes away from the optical lens element are relatively larger than the holes close to the optical lens element.

Abstract: A substrate structure, a method for manufacturing the same and a semiconductor device structure including the same are provided. The substrate structure includes a heat pipe, a first conductive layer and an insulation layer. The heat pipe has an upper surface and a lower surface. The heat pipe includes an opening extending from the upper surface to the lower surface. The first conductive layer is disposed on the upper surface and includes a via structure passing through the opening. The insulation layer is disposed between the heat pipe and the conductive layer.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: A pixel array package structure includes: a substrate; a pixel array disposed on the substrate, in which the pixel array includes a plurality of light emitting diode chips, and the light emitting diode chips include at least one red diode chip, at least one green diode chip, at least one blue diode chip, and a combination thereof; a reflective layer disposed on the substrate and between any two adjacent of the light emitting diode chips; a light-absorbing layer disposed on the reflective layer and surrounding the pixel array; and a light-transmitting layer disposed on the pixel array, the reflective layer, and the light-absorbing layer, in which the light-transmitting layer has an upper surface and a lower surface opposite thereto, and the lower surface is in contact with the pixel array, and the upper surface has a roughness of 0.005 mm to 0.1 mm.

Abstract: An apparatus is disclosed for determining validity of a measured in-blood percentage of oxygenated hemoglobin. The apparatus has multiple pulse oximetry channels having at least three light sources of at least three distinct wavelengths, which are detected and converted to digital signals. The light sources are selectively activated, and two or more estimated in-blood percentages of oxygenated hemoglobin are calculated. It is determined whether a signal quality associated with the calculated in-blood percentages exceeds a predetermined accuracy threshold, and an associated validity indication is provided.

Abstract: A substrate structure, a method for manufacturing the same and a semiconductor device structure including the same are provided. The substrate structure includes a heat pipe, a first conductive layer and an insulation layer. The heat pipe has an upper surface and a lower surface. The heat pipe includes an opening extending from the upper surface to the lower surface. The first conductive layer is disposed on the upper surface and includes a via structure passing through the opening. The insulation layer is disposed between the heat pipe and the conductive layer.

Abstract: The present invention relates to a method of preventing, reducing, or treating cancer in a subject, comprising administering a therapeutically effective amount of or a pharmaceutically acceptable salt, free base, hydrate, complex, or chelate (including metal chelates, such as iron, zinc and others) thereof to the subject, wherein the subject has a mutation in a DNA repair gene.

Abstract: A ball screw adapted to detecting coolant liquid includes a screw, a nut, a plurality of sealing members, a sensor, a signal processing unit and a cover. The nut includes a main body and an end surface, and a through-hole and a flow channel are disposed on the main body. The nut is threadedly disposed on the screw via the through-hole. A plurality of openings are disposed on the end surface, and the openings communicate with the flow channel. The sealing members are disposed in the plurality of openings. The sensor is disposed on one of the sealing members to detect a pressure of the coolant liquid and output an original signal. The signal processing unit is electrically connected to the sensor to receive the original signal and convert the original signal to a digital signal. The cover is disposed on the sensor and fixed to the nut.

Abstract: A semiconductor package structure includes a semiconductor die, at least one wiring structure, a metal support, a passive element, a plurality of signal vias, and a plurality of thermal structures. The semiconductor die has an active surface. The at least one wiring structure is electrically connected to the active surface of the semiconductor die. The metal support is used for supporting the semiconductor die. The passive element is electrically connected to the semiconductor die. The signal vias are electrically connecting the passive element and the semiconductor die. The thermal structures are connected to the passive element, and the thermal structures are disposed on a periphery of the at least one wiring structure.

Abstract: A ball screw adapted to detecting coolant liquid includes a screw, a nut, a plurality of sealing members, a sensor, a signal processing unit and a cover. The nut includes a main body and an end surface, and a through-hole and a flow channel are disposed on the main body. The nut is threadedly disposed on the screw via the through-hole. A plurality of openings are disposed on the end surface, and the openings communicate with the flow channel. The sealing members are disposed in the plurality of openings. The sensor is disposed on one of the sealing members to detect a pressure of the coolant liquid and output an original signal. The signal processing unit is electrically connected to the sensor to receive the original signal and convert the original signal to a digital signal. The cover is disposed on the sensor and fixed to the nut.

Abstract: A timing control circuit and an operating method thereof are provided. The timing control circuit includes a first clock generating circuit, a second clock generating circuit and a control timing generating circuit. The control timing generating circuit is coupled to the first clock generating circuit to receive a first clock signal. The control timing generating circuit is coupled to the second clock generating circuit to receive a second clock signal. The control timing generating circuit starts timing from a first reference time point according to the first clock signal for determining a second reference time point. The control timing generating circuit starts timing from the second reference time point according to the second clock signal for determining a time point of a trailing edge of a current line pulse of a scan reference signal, wherein the current line pulse corresponds to a current scan line of a display panel.

Abstract: Disclosed is an IC layout design method capable of improving a result of an integrated circuit (IC) layout design process including a front-end process and a back-end process. The IC layout design method includes the following steps: executing the front-end process according to an initial clock latency setting and thereby generating an initial netlist; executing at least a part of the back-end process according to the initial netlist and thereby obtaining an updated clock latency setting; executing at least a part of the front-end process according to the updated clock latency setting and thereby generating an updated netlist; and executing the back-end process according to the updated netlist and thereby obtaining the result of the IC layout design process.

Abstract: A timing control circuit and an operating method thereof are provided. The timing control circuit includes a first clock generating circuit, a second clock generating circuit and a control timing generating circuit. The control timing generating circuit is coupled to the first clock generating circuit to receive a first clock signal. The control timing generating circuit is coupled to the second clock generating circuit to receive a second clock signal. The control timing generating circuit starts timing from a first reference time point according to the first clock signal for determining a second reference time point. The control timing generating circuit starts timing from the second reference time point according to the second clock signal for determining a time point of a trailing edge of a current line pulse of a scan reference signal, wherein the current line pulse corresponds to a current scan line of a display panel.

Abstract: An electronic fitness device comprises an optical transmitter, a first lens, an optical receiver, and a second lens. The optical transmitter is operable to transmit an optical signal. The first lens covers at least a portion of the optical transmitter and is operable to direct the optical signal into the skin of a user in a first direction outward from a center of the electronic fitness device. The optical receiver is operable to receive optical signals modulated by the skin of the user and to generate a photoplethysmogram (PPG) signal resulting from the optical signal. The second lens covers at least a portion of the optical receiver and is operable to receive a modulated optical signal from the skin of the user in a second direction inward toward the center of the electronic fitness device and to direct the modulated optical signal toward the optical receiver.

Abstract: A display device includes a substrate, a light-emitting member, and an anti-reflective glass layer. The light-emitting member is on the substrate. The anti-reflective glass layer is over the light-emitting member, and the anti-reflective glass layer has a transmittance of 40-95%. The anti-reflective glass layer includes a glass layer and a light-absorbing layer. The glass layer has a rough top surface and a haze of 70-80%. The light-absorbing layer is on the rough top surface of glass layer.

Abstract: The present invention provides an evaluating system and the use thereof for the efficacy of antimicrobial peptide, which includes the following steps: (a) constructing a peptide by a first input unit, and load the peptide into an aqueous solution for a first time for equilibration; (b) constructing a lipid bilayer by a second input unit, and load the lipid bilayer into an aqueous solution for a second time for equilibration; (c) Using a first processing unit, simulations are carried out for an aqueous system containing an equilibrated peptide from the first input unit and the equilibrated lipid bilayer from the second input unit; (d) calculating the partition free energy of the peptide by a second processing unit; (e) outputting the prediction by an output unit, wherein the output unit is connected with the first processing unit and the second processing unit.

Abstract: Disclosed is an IC layout design method capable of improving the result of an IC layout design process including a front-end process and a back-end process. The IC layout design method includes the following steps: executing the front-end process according to initial clock latency setting and thereby generating an initial netlist; executing at least a part of the back-end process according to the initial netlist and thereby obtaining updated clock latency setting; executing at least a part of the front-end process according to the updated clock latency setting and thereby generating an updated netlist; and executing the back-end process according to the updated netlist and thereby obtaining the result of the IC layout design process.

Abstract: A display device includes a substrate, a light-emitting member, and an anti-reflective glass layer. The light-emitting member is on the substrate. The anti-reflective glass layer is over the light-emitting member, and the anti-reflective glass layer has a transmittance of 40-95%. The anti-reflective glass layer includes a glass layer and a light-absorbing layer. The glass layer has a rough top surface and a haze of 70-80%. The light-absorbing layer is on the rough top surface of glass layer.

Abstract: A system for predicting types of pathogens in patients with septicemia is provided. The system includes at least one sensor and a processor. The sensor is used to sense current physiological data including at least one of body temperature, blood pressure, and pulse. The processor is configured to calculate at least one feature value according to the current physiological data, and input the feature value into a machine learning model to determine one of categories including at least two of uninfected, fungal infected, contaminated bacteria infected, Gram-negative infected, and Gram-positive infected.

Abstract: A semiconductor package structure includes a semiconductor die, at least one wiring structure, a metal support, a passive element, a plurality of signal vias, and a plurality of thermal structures. The semiconductor die has an active surface. The at least one wiring structure is electrically connected to the active surface of the semiconductor die. The metal support is used for supporting the semiconductor die. The passive element is electrically connected to the semiconductor die. The signal vias are electrically connecting the passive element and the semiconductor die. The thermal structures are connected to the passive element, and the thermal structures are disposed on a periphery of the at least one wiring structure.