Patents by Inventor Cheng-Yuan Lee
Cheng-Yuan Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145132Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, and a conductive filler. The polymer matrix has a fluoropolymer. The total volume of the PTC material layer is calculated as 100%, and the fluoropolymer accounts for 47-62% by volume of the PTC material layer. The fluoropolymer has a melt viscosity higher than 3000 Pa·s.Type: ApplicationFiled: March 16, 2023Publication date: May 2, 2024Inventors: CHENG-YU TUNG, CHEN-NAN LIU, Chia-Yuan Lee, HSIU-CHE YEN, YUNG-HSIEN CHANG, Yao-Te Chang, FU-HUA CHU
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Publication number: 20240145133Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a polymer matrix and a first conductive filler. The polymer matrix includes a polyolefin-based polymer and a fluoropolymer. The fluoropolymer has a melt flow index higher than 1.9 g/10 min, and the polyolefin-based polymer and the fluoropolymer together form an interpenetrating polymer network (IPN). The first conductive filler has a metal-ceramic compound dispersed in the polymer matrix.Type: ApplicationFiled: April 5, 2023Publication date: May 2, 2024Inventors: CHEN-NAN LIU, YUNG-HSIEN CHANG, CHENG-YU TUNG, HSIU-CHE YEN, Chia-Yuan LEE, Yao-Te CHANG, FU-HUA CHU
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Publication number: 20240139337Abstract: The present disclosure relates to a method for treating a cancer and/or cancer metastasis in a subject comprising administering to the subject irinotecan loaded in a mesoporous silica nanoparticle. The present disclosure also provides a conjugate comprising an agent loaded in a mesoporous silica nanoparticle (MSN) defining at least one pore and having at least one functional group on a sidewall of the at least one pore.Type: ApplicationFiled: November 2, 2022Publication date: May 2, 2024Inventors: Cheng-Hsun WU, SI-HAN WU, YI-PING CHEN, RONG-LIN ZHANG, CHUNG-YUAN MOU, Yu-Tse LEE
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Publication number: 20240138272Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a first conductive structure over a substrate. A data storage structure overlies the first conductive structure. The data storage structure comprises a first dielectric layer on the first conductive structure and a second dielectric layer on the first dielectric layer. The first dielectric layer comprises a dielectric material and a first dopant having a concentration that changes from a top surface of the first dielectric layer in a direction towards the first conductive structure. A second conductive structure overlies the data storage structure.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Inventors: Fa-Shen Jiang, Cheng-Yuan Tsai, Hai-Dang Trinh, Hsing-Lien Lin, Hsun-Chung Kuang, Bi-Shen Lee
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Publication number: 20240127989Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 33% to 42%.Type: ApplicationFiled: January 25, 2023Publication date: April 18, 2024Inventors: CHIA-YUAN LEE, CHENG-YU TUNG, HSIU-CHE YEN, CHEN-NAN LIU, YUNG-HSIEN CHANG, YAO-TE CHANG, FU-HUA CHU
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Publication number: 20240127988Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 48% to 55%. The conductive filler has a metal-ceramic compound.Type: ApplicationFiled: March 2, 2023Publication date: April 18, 2024Inventors: HSIU-CHE YEN, YUNG-HSIEN CHANG, CHENG-YU TUNG, Chia-Yuan Lee, CHEN-NAN LIU, Yao-Te Chang, FU-HUA CHU
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Publication number: 20240118178Abstract: A staining kit is provided, including a first pattern including antibodies against T cell, B cell, NK cell, monocyte, regulatory cell, CD8, CD45, and CTLA4; a second pattern including antibodies against T cell, B cell, NK cell, monocyte, regulatory cell, dendritic cell, and CD45; a third pattern including antibodies against T cell, B cell, NK cell, monocyte, CD8, CD45, CD45RA, CD62L, CD197, CX3CR1 and TCR??; and a fourth pattern including antibodies against B cell, CD23, CD38, CD40, CD45 and IgM, wherein the antibodies of each pattern are labeled with fluorescent dyes. A method of identifying characterized immune cell subsets of a disease and a method of predicting the likelihood of NPC in a subject in the need thereof using the staining kit are also provided.Type: ApplicationFiled: October 5, 2022Publication date: April 11, 2024Applicant: FULLHOPE BIOMEDICAL CO., LTD.Inventors: Jan-Mou Lee, Li-Jen Liao, Yen-Ling Chiu, Chih-Hao Fang, Kai-Yuan Chou, Pei-Hsien Liu, Cheng-Yun Lee
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Patent number: 11955416Abstract: A semiconductor structure is provided. The semiconductor structure comprises a substrate, a via, a liner layer, a barrier layer, and a conductor. The via penetrates through the substrate. The liner layer is formed on a sidewall of the via. The barrier layer is formed on the liner layer. The barrier layer comprises a conductive 2D material. The conductor fills a remaining space of the via.Type: GrantFiled: September 15, 2021Date of Patent: April 9, 2024Assignee: MACRONIX INTERNATIONAL CO., LTD.Inventors: Cheng-Hsien Lu, Yun-Yuan Wang, Dai-Ying Lee
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Publication number: 20240096400Abstract: A memory device includes a memory bank with a memory cell connected to a local bit line and a word line. A first local data latch is connected to the local bit line and has an enable terminal configured to receive a first local clock signal. A word line latch is configured to latch a word line select signal, and has an enable terminal configured to receive a second local clock signal. A first global data latch is connected to the first local data latch by a global bit line, and the first global data latch has an enable terminal configured to receive a global clock signal. A global address latch is connected to the word line latch and has an enable terminal configured to receive the global clock signal. A bank select latch is configured to latch a bank select signal, and has an enable terminal configured to receive the second local clock signal.Type: ApplicationFiled: January 23, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Yuan CHEN, Hau-Tai SHIEH, Cheng Hung LEE
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Patent number: 11935957Abstract: Semiconductor device structures having gate structures with tunable threshold voltages are provided. Various geometries of device structure can be varied to tune the threshold voltages. In some examples, distances from tops of fins to tops of gate structures can be varied to tune threshold voltages. In some examples, distances from outermost sidewalls of gate structures to respective nearest sidewalls of nearest fins to the respective outermost sidewalls (which respective gate structure overlies the nearest fin) can be varied to tune threshold voltages.Type: GrantFiled: August 9, 2021Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Chiang Wu, Wei-Chin Lee, Shih-Hang Chiu, Chia-Ching Lee, Hsueh Wen Tsau, Cheng-Yen Tsai, Cheng-Lung Hung, Da-Yuan Lee, Ching-Hwanq Su
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Publication number: 20240088001Abstract: A semiconductor device package includes a carrier, an electronic component, a connection element and an encapsulant. The electronic component is disposed on a surface of the carrier. The connection element is disposed on the surface and adjacent to an edge of the carrier. The encapsulant is disposed on the surface of the carrier. A portion of the connection element is exposed from an upper surface and an edge of the encapsulant.Type: ApplicationFiled: September 19, 2023Publication date: March 14, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Cheng-Lin HO, Chih-Cheng LEE, Chun Chen CHEN, Cheng Yuan CHEN
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Patent number: 11923240Abstract: A method of forming a semiconductor device includes forming a first transistor and a second transistor on a substrate. The first transistor includes a first gate structure, and the second transistor includes a second gate structure. The first gate structure includes a first high-k layer, a first work function layer, an overlying work function layer, and a first capping layer sequentially formed on the substrate. The second gate structure comprising a second high-k layer, a second work function layer, and a second capping layer sequentially formed on the substrate. The first capping layer and the second capping layer comprise materials having higher resistant to oxygen or fluorine than materials of the second work function layer and the overlying work function layer.Type: GrantFiled: July 27, 2022Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsin-Yi Lee, Cheng-Lung Hung, Da-Yuan Lee
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Publication number: 20160224493Abstract: A Universal Serial Bus (USB) keyboard-video-mouse (KVM) switch for connection between at least one host and at least one USB device is disclosed. The USB KVM switch includes a first virtual USB hub, a first virtual USB device, a microprocessor and a first multi-address USB device control module. The first virtual USB hub is configured to communicate with a first host. The first virtual USB device is configured to communicate with the first host via the first virtual USB hub, and is provided with endpoint setting data identical with that of a first USB device. The microprocessor is configured to generate the first virtual USB hub, and enumerate the first USB device in response to electrical connection of the first USB device to the USB KVM switch.Type: ApplicationFiled: January 29, 2016Publication date: August 4, 2016Inventors: CHUAN CHIEH WANG, BORBIN YAN, YUNG CHUNG KAO, JUI-FENG HSIEH, CHENG YUAN LEE
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Patent number: 8665977Abstract: A MIMO detection method for a receiver in a MIMO system using N-QAM for modulation, the MIMO detection method including generating a plurality of symbol vector sets and a plurality of search radiuses, selecting a candidate symbol vector set corresponding to a highest level of a multilevel structure of N-QAM constellation, generating a search space corresponding to a lower level of the multilevel structure of N-QAM constellation according to the selected candidate symbol vector set, confirming which level the search space corresponds to, and generating a detection signal according to the search space when the level of the search space is the lowest level of the multilevel structure of the N-QAM constellation.Type: GrantFiled: August 31, 2009Date of Patent: March 4, 2014Assignee: Realtek Semiconductor Corp.Inventors: Shau-Yu Cheng, Cheng-Yuan Lee, Wei-Chi Lai, Terng-Yin Hsu
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Publication number: 20100054365Abstract: A MIMO detection method for a receiver in a MIMO system using N-QAM for modulation, the MIMO detection method including generating a plurality of symbol vector sets and a plurality of search radiuses, selecting a candidate symbol vector set corresponding to a highest level of a multilevel structure of N-QAM constellation, generating a search space corresponding to a lower level of the multilevel structure of N-QAM constellation according to the selected candidate symbol vector set, confirming which level the search space corresponds to, and generating a detection signal according to the search space when the level of the search space is the lowest level of the multilevel structure of the N-QAM constellation.Type: ApplicationFiled: August 31, 2009Publication date: March 4, 2010Inventors: Shau-Yu Cheng, Cheng-Yuan Lee, Wei-Chi Lai, Terng-Yin Hsu