Patents by Inventor Chengfuh Jeffrey Tang
Chengfuh Jeffrey Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9111369Abstract: Disclosed herein are various embodiments of a graphics accelerator, which may include an integrated circuit. The integrated circuit may include a local memory; a direct memory access (DMA) engine; a processor; and one or more processing pipelines. The local memory stores graphics data that includes a plurality of pixels. The DMA engine transfers the graphics data between the local memory and an external memory. The processor performs at least one operation, in parallel, on components of at least a portion of the pixels. The one or more processing pipelines process the graphics data. The graphics accelerator works on operands and produces outputs for one set of pixels while the DMA engine is bringing in operands for a future set of pixel operations, and transfers data from the external memory to the one or more processing pipelines by directing data to the one or more pipelines.Type: GrantFiled: March 1, 2013Date of Patent: August 18, 2015Assignee: BROADCOM CORPORATIONInventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiadong Xie, James T. Patterson, Greg A. Kranawetter
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Patent number: 9077997Abstract: A graphics display system integrated circuit is used in a set-top box for controlling a television display. The graphics display system processes analog video input, digital video input, and graphics input. The system incorporates a unified memory architecture that is shared by the graphics system, a CPU, and other peripherals. The unified memory architecture uses real time scheduling to service tasks. Critical instant analysis is used to find a schedule for memory usage that does not affect memory requirements of real time tasks while at the same time servicing non-real-time tasks as needed.Type: GrantFiled: January 22, 2004Date of Patent: July 7, 2015Assignee: BROADCOM CORPORATIONInventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
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Patent number: 8942295Abstract: Herein described is a method and system of vertically filtering a graphics image such that an enhanced image is provided to a display. Filtering of the graphics image may be accomplished by using one or more window descriptors. The method may be implemented by computing a weighted average of one or more pixel intensities. The system may comprise a memory, a processor, and a graphics engine. The graphics engine may comprise a graphics blender. The graphics blender may comprise one or more multipliers and one or more adders. The processor may execute software resident in the memory, such that the one or more window descriptors may be used to compute the weighted average.Type: GrantFiled: March 29, 2011Date of Patent: January 27, 2015Assignee: Broadcom CorporationInventors: Chengfuh Jeffrey Tang, Steven (Yao-Hua) Tseng
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Patent number: 8854545Abstract: A television on a chip (TVOC) system that provides a cost effective approach for providing television functionality on a single integrated circuit chip is disclosed. A TVOC includes the functionality necessary to receive and display television signals in a variety of input and output formats. A TVOC can be used in set-top boxes for cable and satellite television, or directly within a television. All functionality provided can be provided on a single integrated circuit. TVOC includes a data transport module, an IF demodulator, a digital audio engine, an analog audio engine, a digital video engine, and an analog video engine. The TVOC also includes three sets of interfaces including output interfaces, control interfaces and ancillary interfaces. Further features and embodiments provide enhanced functionality and increased efficiencies.Type: GrantFiled: June 14, 2011Date of Patent: October 7, 2014Assignee: Broadcom CorporationInventors: David A. Baer, Jeff Tingley, Aleksandr Movshovich, Brad Grossman, Brian F. Schoner, Chengfuh Jeffrey Tang, Chuck Monahan, Darren D. Neuman, David Chao Hua Wu, Francis Cheung, Greg A. Kranawetter, Hoang Nhu, Hsien-Chih Jim Tseng, Iue-Shuenn Chen, James D. Sweet, Jeffrey S. Bauch, Keith LaRell Klingler, Patrick Law, Rajesh Mamidwar, Dan Simon, Sang Van Tran, Shawn V. Johnson, Steven T. Jaffe, Thu T. Nguyen, Ut Nguyen, Yao-Hua Steven Tseng, Brad Delanghe, Ben Giese, Jason Demas, Lakshman Ramakrishnan, Sandeep Bhatia, Guang-Ting Shih, Tracy C. Denk
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Patent number: 8848792Abstract: A video and graphics system has a reduced memory mode in which video images are reduced in half in horizontal direction during decoding. The video and graphics system includes a video decoder for decoding MPEG-2 video data. The video images may not be downscaled in the horizontal direction when no bi-directionally predicted pictures are used. The video and graphics system may output an HDTV video while converting the HDTV video and providing as another output having an SDTV format or another HDTV format. The output having an SDTV format may be recorded using a video cassette recorder (VCR) while the HDTV video is being displayed.Type: GrantFiled: August 1, 2011Date of Patent: September 30, 2014Assignee: Broadcom CorporationInventors: Alexander MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, Vivian Hsiun
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Patent number: 8659608Abstract: A video and graphics system on an integrated circuit chip includes an integrated system bridge controller to interface a CPU with devices internal to the system as well as external peripheral devices. The system bridge controller is capable of performing format conversion between big-endian data and little-endian data. The system bridge controller includes a PCI bridge to interface with PCI devices, an I/O bus bridge to interface with I/O devices such as RAM, ROM, flash memory and 68000-compatible peripheral devices, and a CPU interface block to interface the CPU to video processing devices on the integrated circuit chip such as an MPEG video decoder.Type: GrantFiled: September 22, 2008Date of Patent: February 25, 2014Assignee: Broadcom CorporationInventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Greg A. Kranawetter
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Patent number: 8493415Abstract: A method for processing video data includes performing by one or more processors and/or circuits in a video processing device, the one or more processors and/or circuits including a video scaler, a memory, and a scaler engine, functions including receiving a video image by the video processing device. The functions also include determining whether the video scaler requires less memory bandwidth to scale the video image before writing the video image to the memory or after reading the video image from the memory, and scaling the video image based on the determination. If the video scaler requires less memory bandwidth to scale the video image before writing the video image to the memory, performing by the one or more processors and/or circuits scaling of the video image in the video scaler using a video input clock of the video scaler to generate a first scaled video image.Type: GrantFiled: April 5, 2011Date of Patent: July 23, 2013Assignee: Broadcom CorporationInventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
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Patent number: 8390635Abstract: A graphics display system integrated circuit processes analog video input, digital video input, and graphics input. The system incorporates a graphics accelerator that includes memory for graphics data. The accelerator preferably includes a coprocessor for performing vector type operations on a plurality of components of one pixel of the graphics data. The accelerator also includes an expanded instruction set for storing and loading data.Type: GrantFiled: October 15, 2010Date of Patent: March 5, 2013Assignee: Broadcom CorporationInventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
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Publication number: 20120268655Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, and graphics input. The chip includes a single polyphase filter that preferably provides both anti-flutter filtering and scaling of graphics. Anti-flutter filtering may help reduce display flicker due to the interlaced nature of television displays. The scaling of graphics may be used to convert the normally square pixel aspect ratio of graphics to the normally rectangular pixel aspect ratio of video.Type: ApplicationFiled: April 23, 2012Publication date: October 25, 2012Applicant: BROADCOM CORPORATIONInventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
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Publication number: 20120147974Abstract: A television on a chip (TVOC) system that provides a cost effective approach for providing television functionality on a single integrated circuit chip is disclosed. A TVOC includes the functionality necessary to receive and display television signals in a variety of input and output formats. A TVOC can be used in set-top boxes for cable and satellite television, or directly within a television. All functionality provided can be provided on a single integrated circuit. TVOC includes a data transport module, an IF demodulator, a digital audio engine, an analog audio engine, a digital video engine, and an analog video engine. The TVOC also includes three sets of interfaces including output interfaces, control interfaces and ancillary interfaces. Further features and embodiments provide enhanced functionality and increased efficiencies.Type: ApplicationFiled: June 14, 2011Publication date: June 14, 2012Applicant: Broadcom CorporationInventors: David A. BAER, Jeff Tingley, Aleksandr Movshovich, Brad Grossman, Brian F. Schoner, Chengfuh Jeffrey Tang, Chuck Monahan, Darren D. Neuman, David Chao Hua Wu, Francis Cheung, Greg A. Kranawetter, Hoang Nhu, Hsien-Chih Jim Tseng, Iue-Shuenn Chen, James D. Sweet, Jeffrey S. Bauch, Keith LaRell Klingler, Patrick Law, Rajesh Mamidwar, Dan Simon, Sang Van Tran, Shawn V. Johnson, Steven T. Jaffe, Thu T. Nguyen, Ut Nguyen, Yao-Hua Steven Tseng, Brad Delanghe, Ben Giese, Jason Demas, Lakshman Ramakrishnan, Sandeep Bhatia, Guang-Ting Shih, Tracy C. Denk
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Patent number: 8199154Abstract: Herein described is a method and system of displaying low resolution graphics onto a high resolution display. The low resolution graphics may be displayed using one or more displayable maps or surfaces, each of which is defined by way of one or more parameters. The display may comprise a monitor, television set, or set top box, capable of displaying at a particular resolution. In one or more representative embodiments, the various aspects of the invention permit scaling the low resolution graphics onto the high resolution display by way of using the one or more displayable maps or surfaces such that the graphics data is properly displayed on the higher resolution display.Type: GrantFiled: July 12, 2011Date of Patent: June 12, 2012Assignee: Broadcom CorporationInventors: Chengfuh Jeffrey Tang, Steven (Yao-Hua) Tseng
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Patent number: 8164601Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, and graphics input. The chip includes a single polyphase filter that preferably provides both anti-flutter filtering and scaling of graphics. Anti-flutter filtering may help reduce display flicker due to the interlaced nature of television displays. The scaling of graphics may be used to convert the normally square pixel aspect ratio of graphics to the normally rectangular pixel aspect ratio of video.Type: GrantFiled: November 23, 2010Date of Patent: April 24, 2012Assignee: Broadcom CorporationInventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
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Publication number: 20120093215Abstract: A method for processing video data includes performing by one or more processors and/or circuits in a video processing device, the one or more processors and/or circuits including a video scaler, a memory, and a scaler engine, functions including receiving a video image by the video processing device. The functions also include determining whether the video scaler requires less memory bandwidth to scale the video image before writing the video image to the memory or after reading the video image from the memory, and scaling the video image based on the determination. If the video scaler requires less memory bandwidth to scale the video image before writing the video image to the memory, performing by the one or more processors and/or circuits scaling of the video image in the video scaler using a video input clock of the video scaler to generate a first scaled video image.Type: ApplicationFiled: April 5, 2011Publication date: April 19, 2012Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
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Patent number: 8078981Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, a graphics input and an audio input simultaneously. The chip processes graphics images organized as windows. The chip obtains data that describes the windows, sorts the data according to the depth of the window on the display, transfers graphics images from memory, and blends the graphics images using alpha values associated with the graphics images.Type: GrantFiled: November 10, 2008Date of Patent: December 13, 2011Assignee: Broadcom CorporationInventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
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Publication number: 20110292082Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, and graphics input. The chip includes a single polyphase filter that preferably provides both anti-flutter filtering and scaling of graphics. Anti-flutter filtering may help reduce display flicker due to the interlaced nature of television displays. The scaling of graphics may be used to convert the normally square pixel aspect ratio of graphics to the normally rectangular pixel aspect ratio of video.Type: ApplicationFiled: November 24, 2010Publication date: December 1, 2011Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
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Publication number: 20110292074Abstract: A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, and graphics input. The chip includes a single polyphase filter that preferably provides both anti-flutter filtering and scaling of graphics. Anti-flutter filtering may help reduce display flicker due to the interlaced nature of television displays. The scaling of graphics may be used to convert the normally square pixel aspect ratio of graphics to the normally rectangular pixel aspect ratio of video.Type: ApplicationFiled: November 23, 2010Publication date: December 1, 2011Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, James T. Patterson, Greg A. Kranawetter
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Publication number: 20110280307Abstract: A video and graphics system has a reduced memory mode in which video images are reduced in half in horizontal direction during decoding. The video and graphics system includes a video decoder for decoding MPEG-2 video data. The video images may not be downscaled in the horizontal direction when no bi-directionally predicted pictures are used. The video and graphics system may output an HDTV video while converting the HDTV video and providing as another output having an SDTV format or another HDTV format. The output having an SDTV format may be recorded using a video cassette recorder (VCR) while the HDTV video is being displayed.Type: ApplicationFiled: August 1, 2011Publication date: November 17, 2011Inventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, Vivian Hsiun
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Publication number: 20110273476Abstract: Herein described is a method and system of displaying low resolution graphics onto a high resolution display. The low resolution graphics may be displayed using one or more displayable maps or surfaces, each of which is defined by way of one or more parameters. The display may comprise a monitor, television set, or set top box, capable of displaying at a particular resolution. In one or more representative embodiments, the various aspects of the invention permit scaling the low resolution graphics onto the high resolution display by way of using the one or more displayable maps or surfaces such that the graphics data is properly displayed on the higher resolution display.Type: ApplicationFiled: July 12, 2011Publication date: November 10, 2011Inventors: Chengfuh Jeffrey Tang, Steven (Yao-Hua) Tseng
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Publication number: 20110234618Abstract: Herein described is a method and system of vertically filtering a graphics image such that an enhanced image is provided to a display. Filtering of the graphics image may be accomplished by using one or more window descriptors. The method may be implemented by computing a weighted average of one or more pixel intensities. The system may comprise a memory, a processor, and a graphics engine. The graphics engine may comprise a graphics blender. The graphics blender may comprise one or more multipliers and one or more adders. The processor may execute software resident in the memory, such that the one or more window descriptors may be used to compute the weighted average.Type: ApplicationFiled: March 29, 2011Publication date: September 29, 2011Inventors: Chengfuh Jeffrey Tang, Steven (Yao-Hua) Tseng
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Patent number: 8022966Abstract: A video, audio and graphics system uses multiple transport processors to receive in-band and out-of-band MPEG Transport streams, to perform PID and section filtering as well as DVB and DES decryption and to de-multiplex them. The system processes the PES into digital audio, MPEG video and message data. The system is capable of decoding multiple MPEG SLICEs concurrently. Graphics windows are blended in parallel, and blended with video using alpha blending. During graphics processing, a single-port SRAM is used equivalently as a dual-port SRAM. The video may include both analog video, e.g., NTSC/PAL/SECAM/S-video, and digital video, e.g., MPEG-2 video in SDTV or HDTV format. The system has a reduced memory mode in which video images are reduced in half in horizontal direction only during decoding. The system is capable of receiving and processing digital audio signals such as MPEG Layer 1 and Layer 2 audio and Dolby AC-3 audio, as well as PCM audio signals. The system includes a memory controller.Type: GrantFiled: December 30, 2009Date of Patent: September 20, 2011Assignee: Broadcom CorporationInventors: Alexander G. MacInnis, Chengfuh Jeffrey Tang, Xiaodong Xie, Greg A. Kranawetter, Vivian Hsiun, Francis Cheung, Sandeep Bhatia, Ramanujan Valmiki, Sathish Kumar Radhakrishnan