Patents by Inventor Chengjun Wang

Chengjun Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170133971
    Abstract: Provided is an overvoltage protection device for protecting a wind turbine against overvoltage. The device includes a double fed induction generator (DFIG) including a rotor connection including a plurality of electrical connections coupled to rotor leads of the DFIG and a stator connection including a plurality of electrical connections coupled to stator leads of the DFIG. Also included is a self-triggering circuit coupled with the rotor connection and operative in response to changes in a utility grid voltage during a grid fault when an overvoltage event is detected such that the overvoltage protection circuit automatically operates, independently of a controller or a sensor, to reduce the detected overvoltage to a predetermined voltage level.
    Type: Application
    Filed: July 2, 2014
    Publication date: May 11, 2017
    Applicant: GE Energy Power Conversion Technology Ltd
    Inventors: Jincheng HUANG, Jie DING, Chengjun WANG, Jun ZHU
  • Patent number: 9539905
    Abstract: The invention discloses a three-DOF hybrid damping pantograph, comprising an electric driving transmission system fixed on a base, and collector heads, transverse dampers, parallel support frames as well as longitudinal dampers. Square auxiliary holes are arranged on the base, supporting insulators are arranged on four angles below the base; four transverse dampers are symmetrically fixed on the base, and arranged on the outside of the parallel support frames and connected with the parallel support frames through hinges; four longitudinal dampers are symmetrically fixed on the top of the parallel support frames; the collector heads are connected with the parallel support frames by the longitudinal dampers and separators are arranged on the collector heads. The invention can realize bearing and damping spatially in three directions, avoid pantograph detachment, catenary scraping and other safety accidents, and improve the structural stability of the pantograph and adaptability to the catenary.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: January 10, 2017
    Assignees: Anhui University of Science and Technology
    Inventors: Chengjun Wang, Long Li, Xiaolong Zhu, Zhiwei Liu, Chao Zhang, Kai Liu, Tianyu Zhang
  • Publication number: 20160257205
    Abstract: The invention discloses a three-DOF hybrid damping pantograph, comprising an electric driving transmission system fixed on a base, and collector heads, transverse dampers, parallel support frames as well as longitudinal dampers. Square auxiliary holes are arranged on the base, supporting insulators are arranged on four angles below the base; four transverse dampers are symmetrically fixed on the base, and arranged on the outside of the parallel support frames and connected with the parallel support frames through hinges; four longitudinal dampers are symmetrically fixed on the top of the parallel support frames; the collector heads are connected with the parallel support frames by the longitudinal dampers and separators are arranged on the collector heads. The invention can realize bearing and damping spatially in three directions, avoid pantograph detachment, catenary scraping and other safety accidents, and improve the structural stability of the pantograph and adaptability to the catenary.
    Type: Application
    Filed: May 28, 2015
    Publication date: September 8, 2016
    Applicants: ANHUI UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Chengjun Wang, Long Li, Xiaolong Zhu, Zhiwei Liu, Chao Zhang, Kai Liu, Tianyu Zhang
  • Patent number: 8907716
    Abstract: A device includes a controller configured to regulate one or more voltages applied to a gate of an insulated gate bipolar transistor (IGBT). The controller is configured to receive one or more voltage values associated with the IGBT, and generate a gating signal and transmit the gating signal to the IGBT. The gating signal is configured to activate or deactivate the IGBT. The controller is configured to generate a voltage clamping signal and transmit the voltage clamping signal to activate or deactivate an active switching device. The active switching device is configured to periodically limit the one or more voltage values associated with the IGBT based at least in part on one or more characteristics of the voltage clamping signal.
    Type: Grant
    Filed: February 14, 2013
    Date of Patent: December 9, 2014
    Assignee: General Electric Company
    Inventors: Jun Zhu, Robert Gregory Wagoner, Huibin Zhu, Chengjun Wang
  • Publication number: 20140184308
    Abstract: A device includes a controller configured to regulate one or more voltages applied to a gate of an insulated gate bipolar transistor (IGBT). The controller is configured to receive one or more voltage values associated with the IGBT, and generate a gating signal and transmit the gating signal to the IGBT. The gating signal is configured to activate or deactivate the IGBT. The controller is configured to generate a voltage clamping signal and transmit the voltage clamping signal to activate or deactivate an active switching device. The active switching device is configured to periodically limit the one or more voltage values associated with the IGBT based at least in part on one or more characteristics of the voltage clamping signal.
    Type: Application
    Filed: February 14, 2013
    Publication date: July 3, 2014
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Jun Zhu, Robert Gregory Wagoner, Huibin Zhu, Chengjun Wang
  • Patent number: 8327046
    Abstract: In one embodiment the present invention includes an apparatus having a random access memory, a first interface, and a second interface. The first interface is coupled between the random access memory and a plurality of storage devices, and operates in a first in first out (FIFO) manner. The second interface is coupled between the random access memory and a processor, and operates in a random access manner. As a result, the processor is not required to be in the loop when data is being transferred between the random access memory and the storage devices.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: December 4, 2012
    Assignee: Marvell International Ltd.
    Inventors: Li Sha, Ching-Han Tsai, Chengjun Wang
  • Patent number: 8127058
    Abstract: In one embodiment the present invention includes an apparatus having a random access memory, a first interface, and a second interface. The first interface is coupled between the random access memory and a plurality of storage devices, and operates in a first in first out (FIFO) manner. The second interface is coupled between the random access memory and a processor, and operates in a random access manner. As a result, the processor is not required to be in the loop when data is being transferred between the random access memory and the storage devices.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: February 28, 2012
    Assignee: Marvell International Ltd.
    Inventors: Li Sha, Ching-Han Tsai, Chengjun Wang
  • Patent number: D762143
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: July 26, 2016
    Assignee: Brue & Yin, LLC
    Inventors: Chuan-sheng Tu, Jie Ren, Chengjun Wang
  • Patent number: D763735
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: August 16, 2016
    Assignee: Brue & Yin LLC
    Inventors: Chuan-sheng Tu, Jie Ren, Chengjun Wang
  • Patent number: D772757
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: November 29, 2016
    Inventors: Chuan-sheng Tu, Jie Ren, Chengjun Wang