Patents by Inventor Cheng Qiang Cui
Cheng Qiang Cui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8361837Abstract: A method of assembling a multi-die package is achieved. A heat spreader is disposed on a printed circuit substrate. At least one integrated circuit die is disposed on a top side of the heat spreader and at least one other integrated circuit die is disposed on a bottom side of the heat spreader wherein the dies are connected to the substrate by wire bonds. Thermal solder balls are electrically connected to solderable pads of the heat spreader through the open holes of the substrate, so as to couple the heat spreader to function as a ground plane. Some of the ground pads of the dies can be bonded onto the heat spreader and the others bonded onto the substrate. Alternatively, all of the dies could only be connected to the substrate by wire bonding, and not connected to the heat spreader.Type: GrantFiled: March 4, 2011Date of Patent: January 29, 2013Assignee: Compass Technology Co. Ltd.Inventors: Cheng Qiang Cui, Chee Wah Cheung
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Patent number: 7985672Abstract: A method of attaching a solder ball to a bonding pad includes disposing flux on the bonding pad, attaching a conductive metal ring to the pad using the flux, and placing the solder ball in the ring. A reflow operation is performed that secures the ring to the pad and melts the solder ball into and around the ring. A solder joint is formed between solder ball and the pad, with the ring secured within the ball. Use of the ring allows for higher stand-off height to be achieved with similar solder ball size, without having to use bigger ball size as in the conventional method, which causes solder ball bridging. With higher stand-off height, better board level reliability performance can be obtained.Type: GrantFiled: November 28, 2007Date of Patent: July 26, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Poh Leng Eu, Lan Chu Tan, Cheng Qiang Cui
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Publication number: 20110159640Abstract: A method of assembling a multi-die package is achieved. A heat spreader is disposed on a printed circuit substrate. At least one integrated circuit die is disposed on a top side of the heat spreader and at least one other integrated circuit die is disposed on a bottom side of the heat spreader wherein the dies are connected to the substrate by wire bonds. Thermal solder balls are electrically connected to solderable pads of the heat spreader through the open holes of the substrate, so as to couple the heat spreader to function as a ground plane. Some of the ground pads of the dies can be bonded onto the heat spreader and the others bonded onto the substrate. Alternatively, all of the dies could only be connected to the substrate by wire bonding, and not connected to the heat spreader.Type: ApplicationFiled: March 4, 2011Publication date: June 30, 2011Inventors: Cheng Qiang Cui, Chee Wah Cheung
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Patent number: 7906844Abstract: A multi-die package comprises a heat spreader disposed on a printed circuit substrate, at least one integrated circuit die disposed on a top side of the heat spreader and at least one other integrated circuit die disposed on a bottom side of the heat spreader wherein the dies are connected to the substrate by wire bonds. Thermal solder balls are electrically connected to solderable pads of the heat spreader through the open holes of the substrate, so as to couple the heat spreader to function as a ground plane. Some of the ground pads of the dies can be bonded onto the heat spreader and the others bonded onto the substrate. Alternatively, all of the dies could only be connected to the substrate by wire bonding, and not connected to the heat spreader.Type: GrantFiled: September 26, 2006Date of Patent: March 15, 2011Assignee: Compass Technology Co. Ltd.Inventors: Cheng Qiang Cui, Chee Wah Cheung
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Publication number: 20110059579Abstract: A method of forming a semiconductor package including providing a substrate having a through hole formed therein. A tape is attached to a surface of the substrate such that the through hole is covered by the tape. An integrated circuit (IC) die is attached to the tape. The IC die is electrically connected to the substrate via a plurality of electrical connections. The IC die and the electrical connections are encapsulated and the tape is removed from the substrate.Type: ApplicationFiled: September 8, 2009Publication date: March 10, 2011Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Poh Leng Eu, Lan Chu Tan, Cheng Qiang Cui
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Patent number: 7573131Abstract: A printed circuit substrate is disposed on a bottom side of a stiffener. An IC die is disposed on a top side of the stiffener. The die is electrically connected onto the printed circuit substrate by wire bonding through an open slot in the stiffener. The die is not wire bonded to the stiffener. Solder balls are attached on a bottom side of the substrate and electrically connected to ground bond fingers of the substrate, and also are directly attached to solderable pads on the bottom side of the stiffener through open holes or plated through-holes on the substrate, so as to have the stiffener function as a ground plane and as a heat sink for power dissipation.Type: GrantFiled: October 27, 2006Date of Patent: August 11, 2009Assignee: Compass Technology Co., Ltd.Inventors: Cheng Qiang Cui, Kai C. Ng, Chee Wah Cheung
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Publication number: 20090134207Abstract: A method of attaching a solder ball to a bonding pad includes disposing flux on the bonding pad, attaching a conductive metal ring to the pad using the flux, and placing the solder ball in the ring. A reflow operation is performed that secures the ring to the pad and melts the solder ball into and around the ring. A solder joint is formed between solder ball and the pad, with the ring secured within the ball. Use of the ring allows for higher stand-off height to be achieved with similar solder ball size, without having to use bigger ball size as in the conventional method, which causes solder ball bridging. With higher stand-off height, better board level reliability performance can be obtained.Type: ApplicationFiled: November 28, 2007Publication date: May 28, 2009Inventors: Poh Leng EU, Lan Chu TAN, Cheng Qiang CUI
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Publication number: 20080099898Abstract: A printed circuit substrate is disposed on a bottom side of a stiffener. An IC die is disposed on a top side of the stiffener. The die is electrically connected onto the printed circuit substrate by wire bonding through an open slot in the stiffener. The die is not wire bonded to the stiffener. Solder balls are attached on a bottom side of the substrate and electrically connected to ground bond fingers of the substrate, and also are directly attached to solderable pads on the bottom side of the stiffener through open holes or plated through-holes on the substrate, so as to have the stiffener function as a ground plane and as a heat sink for power dissipation.Type: ApplicationFiled: October 27, 2006Publication date: May 1, 2008Inventors: Cheng Qiang Cui, Kai C. Ng, Chee Wah Cheung
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Publication number: 20080073777Abstract: A multi-die package comprises a heat spreader disposed on a printed circuit substrate, at least one integrated circuit die disposed on a top side of the heat spreader and at least one other integrated circuit die disposed on a bottom side of the heat spreader wherein the dies are connected to the substrate by wire bonds. Thermal solder balls are electrically connected to solderable pads of the heat spreader through the open holes of the substrate, so as to couple the heat spreader to function as a ground plane. Some of the ground pads of the dies can be bonded onto the heat spreader and the others bonded onto the substrate. Alternatively, all of the dies could only be connected to the substrate by wire bonding, and not connected to the heat spreader.Type: ApplicationFiled: September 26, 2006Publication date: March 27, 2008Inventors: Cheng Qiang Cui, Chee Wah Cheung
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Patent number: 6540866Abstract: The present invention is directed to a method for the lamination of fluoropolymers to the surfaces of metals, and especially to copper, gold, and platinum, and to printed circuit board (PCB) substrate at temperatures substantially below the sintering temperatures or melting temperatures of the fluoropolymers. More specifically, the invention is directed to a method for surface modification of fluoropolymers by thermal graft copolymerization with concurrent lamination of metals in the presence of a functional monomer and an adhesive such as an epoxy resin. The process can be carried out under atmospheric conditions and in the complete absence of an added polymerization initiator. The laminated fluoropolymer-metal or fluoropolymer-PCB substrate interfaces exhibit T-peel strengths of no less than 8 N/cm. This invention can also be applied to substantially improve the adhesion between PCB substrates and metals.Type: GrantFiled: June 28, 2000Date of Patent: April 1, 2003Assignees: Institute of Microelectronics, National University of SingaporeInventors: Junfeng Zhang, Cheng Qiang Cui, Thiam Beng Lim, En-Tang Kang
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Patent number: 6537411Abstract: The present invention is directed to a method for the lamination of metals, and especially copper, to the surface of polyimides and derivatives of polyimides at temperatures substantially below the curing temperature of the imide polymers. More specifically, the invention is directed to a method for surface modification of polyimides and derivatives of polyimides by thermal graft copolymerization and interfacial polymerization with concurrent lamination of the metal of interest in the presence of an appropriate functional monomer. The process can be carried out under atmospheric conditions and either in the presence or the complete absence of an added polymerization initiator. The so laminated polyimide-metal interfaces exhibit T-peel adhesion strengths in excess of 16 N/cm. The adhesion strength also exceeds the fracture strength of polyimide films with a thickness of 75 &mgr;m.Type: GrantFiled: June 28, 2000Date of Patent: March 25, 2003Assignees: The National University of Singapore, Institute of MicroelectronicsInventors: En-Tang Kang, Arthur Khoon Siah Ang, Koon Gee Neoh, Cheng Qiang Cui, Thiam Beng Lim
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Patent number: 6334926Abstract: The present invention is directed to a method for the lamination of metals, and especially copper, to the surfaces of fluoropolymers at temperatures substantially below the sintering temperatures or melting temperatures of the fluoropolymers. More specifically, the invention is directed to a method for surface modification of fluoropolymers by thermal graft copolymerization with concurrent lamination of a metal (e.g. copper) in the presence of a functional monomer. The process can be carried out under atmospheric conditions and in the complete absence of an added polymerization initiator. The so-laminated fluoropolymer-metal interfaces exhibit T-peel strengths of no less than 8 N/cm and delaminate via cohesive failure inside the fluoropolymer.Type: GrantFiled: June 8, 1999Date of Patent: January 1, 2002Assignee: National University of Singapore and Institute of MicroelectronicsInventors: En Tang Kang, Jian-Li Shi, Koon Gee Neoh, Kuang Lee Tan, Cheng Qiang Cui, Thiam Beng Lim
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Patent number: 6274650Abstract: Disclosed are liquid epoxy encapsulants comprising a basic bisphenol-type epoxy resin with epoxy groups at each end having an epoxy equivalent of 170-300, and an amine curing agent such as 4,4′-Methylene dianiline with the content of 15-30 wt % with respect to epoxy resins and other additives such as coloring agents, flame retardants, and catalysts. Alphatic and cycloaliphatic epoxy resins and polyamide curing agents can optionally be added to mix with the bisphenol epoxy resin to modify the properties of the liquid epoxy encapsulants, i.e., to decrease their viscosities and to increase their toughness. The liquid epoxy encapsulants of this invention have characteristics of suitable viscosity, fast curing, high adhesion to polyimides and high reliability in the application of flip-chip-on-board (FCOB) encapsulation as underfill materials.Type: GrantFiled: September 16, 1999Date of Patent: August 14, 2001Assignee: Institute of MicroelectronicsInventor: Cheng Qiang Cui