Patents by Inventor Cheng-Wei Wang

Cheng-Wei Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955154
    Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
  • Patent number: 11921101
    Abstract: Disclosed are calibration techniques that can be implemented by a device that conducts biological tests. In certain embodiments, the device for testing a biological specimen includes a receiving mechanism to receive a carrier, a camera module arranged to capture imagery of the carrier, and a processor. Some examples of the processor can detect a calibration mode trigger. In calibration mode, the processor can divide the captured imagery into segments and selectively perform one or more calibration procedures for each segment. Then, the processor records a calibration result for each segment.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: March 5, 2024
    Assignee: Bonraybio Co., Ltd.
    Inventors: Cheng-Teng Hsu, Chih-Pin Chang, Kuang-Li Huang, Yu-Chiao Chi, Chia-Wei Chang, Chiung-Han Wang
  • Publication number: 20230266676
    Abstract: The present disclosure provides a semiconductor structure and a system for manufacturing the semiconductor structure. The system includes a fabrication equipment, configured to perform operations to form a layer on a wafer; an exposure equipment, configured to perform patterning operations to form a pattern of the layer; and an alignment equipment, configured to detect an alignment of two overlay marks at different elevations on the wafer. The alignment equipment includes a stage, configured to support the wafer; an optical device, configured to emit a radiation to excite a photoluminescent material of one of the two overlay marks; an optical filter, configured to receive and filter a radiation emitted from the photoluminescent material; and an optical detector, configured to convert an optical signal filtered by the optical filter to an electrical signal.
    Type: Application
    Filed: February 24, 2022
    Publication date: August 24, 2023
    Inventor: CHENG-WEI WANG
  • Publication number: 20230266660
    Abstract: The present disclosure provides a method of manufacturing a semiconductor structure. The method includes several operations. A substrate including a device region and a scribe line region is provided. A first layer is formed over the substrate. A first photoluminescent layer is formed over the first layer in the scribe line region. The first layer and the first photoluminescent layer are patterned to form a first pattern in the scribe line region. A first patterned mask layer is formed over a second layer. An alignment of the first patterned mask layer and the first pattern is detected. A pattern of the first patterned mask layer is transferred to the second layer to form a second pattern in the scribe line region.
    Type: Application
    Filed: February 24, 2022
    Publication date: August 24, 2023
    Inventor: Cheng-Wei WANG
  • Patent number: 11685008
    Abstract: A dodge method of machining path and a machining system is provided. By inserting a flag into an original machining path, an interference between the flag and a suction cup of a support unit is determined. A coding instruction is inserted at the interference to edit the original machining path, thereby generating an edited machining path. Therefore, when a machining equipment executes the edited machining path, the support unit may smoothly dodge a knife of the machining equipment.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: June 27, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Chun-Ting Chen, Cheng-Wei Wang, Po-Hsun Wu, Chien-Chih Liao, Jen-Ji Wang
  • Patent number: 11654522
    Abstract: A method for analyzing an overcutting defect of a machining process comprises steps as following. A machining code is executed to generate a cutting face, wherein the cutting face comprises a plurality of machining paths. A specified machining path is defined from the plurality of machining paths and a specified node is set on the specified machining path. A sectional plane passing through the specified node is calculated. A plurality of intersection points between the sectional plane and the other machining paths which are different from the specified machining path are obtained. A first adjacent intersection point a second adjacent intersection point are specified from the intersection points. A connection line located between the first adjacent intersection point and the second adjacent intersection point is obtained. A distance between the specified node and connection line is calculate and the distance is defined as an overcutting amount of the specified node.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: May 23, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Chih Liao, Kuo-Hua Chou, Cheng-Wei Wang, Jen-Ji Wang
  • Publication number: 20220212304
    Abstract: A method for analyzing an overcutting defect of a machining process comprises steps as following. A machining code is executed to generate a cutting face, wherein the cutting face comprises a plurality of machining paths. A specified machining path is defined from the plurality of machining paths and a specified node is set on the specified machining path. A sectional plane passing through the specified node is calculated. A plurality of intersection points between the sectional plane and the other machining paths which are different from the specified machining path are obtained. A first adjacent intersection point a second adjacent intersection point are specified from the intersection points. A connection line located between the first adjacent intersection point and the second adjacent intersection point is obtained. A distance between the specified node and connection line is calculate and the distance is defined as an overcutting amount of the specified node.
    Type: Application
    Filed: February 18, 2021
    Publication date: July 7, 2022
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Chih LIAO, Kuo-Hua CHOU, Cheng-Wei WANG, Jen-Ji WANG
  • Patent number: 11119465
    Abstract: A method for inspecting defects of a machining path is provided. The method includes the following steps. Firstly, a contour mold with a plurality of surface nodes is generated according to a machining program code. Next, a normal vector of each surface node of the contour mold is calculated. Then, a tangent vector of a block of the machining program code corresponding to the normal vector is calculated. Afterwards, an error information is obtained according to a relation between the normal vector and the tangent vector. When the error information is greater than a predetermined value, a defect information is shown on the contour mold.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: September 14, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Wei Wang, Kuo-Hua Chou, Chien-Chih Liao, Jen-Ji Wang
  • Publication number: 20210208565
    Abstract: A method for inspecting defects of a machining path is provided. The method includes the following steps. Firstly, a contour mold with a plurality of surface nodes is generated according to a machining program code. Next, a normal vector of each surface node of the contour mold is calculated. Then, a tangent vector of a block of the machining program code corresponding to the normal vector is calculated. Afterwards, an error information is obtained according to a relation between the normal vector and the tangent vector. When the error information is greater than a predetermined value, a defect information is shown on the contour mold.
    Type: Application
    Filed: May 13, 2020
    Publication date: July 8, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Wei WANG, Kuo-Hua CHOU, Chien-Chih LIAO, Jen-Ji WANG
  • Patent number: 10838403
    Abstract: A simulation method for milling by use of a dynamic position error includes the steps of: (a) generating a milling surface from a numerical control code, the milling surface having a plurality of grid points, the numerical control code having a position command; (b) calculating a normal vector for each of the plurality of grid points on the milling surface; (c) feeding back a position feedback of each of the plurality of grid points by the controller of the machine tool, and deriving a corresponding three-axis dynamic position error of the milling surface according to the position command and the position feedback; (d) calculating a component of the normal vector for the three-axis dynamic position error so as to obtain a normal-vector error value of the corresponding grid point; and, (e) displaying undercutting information of the normal-vector error value of the corresponding grid point on the milling surface.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: November 17, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng-Wei Wang, Kuo-Hua Chou, Chien-Chih Liao, Jen-Ji Wang
  • Publication number: 20200166906
    Abstract: A simulation method for milling by use of a dynamic position error includes the steps of: (a) generating a milling surface from a numerical control code, the milling surface having a plurality of grid points, the numerical control code having a position command; (b) calculating a normal vector for each of the plurality of grid points on the milling surface; (c) feeding back a position feedback of each of the plurality of grid points by the controller of the machine tool, and deriving a corresponding three-axis dynamic position error of the milling surface according to the position command and the position feedback; (d) calculating a component of the normal vector for the three-axis dynamic position error so as to obtain a normal-vector error value of the corresponding grid point; and, (e) displaying undercutting information of the normal-vector error value of the corresponding grid point on the milling surface.
    Type: Application
    Filed: December 21, 2018
    Publication date: May 28, 2020
    Inventors: CHENG-WEI WANG, KUO-HUA CHOU, CHIEN-CHIH LIAO, JEN-JI WANG
  • Patent number: 10147611
    Abstract: The present disclosure provides a method for preparing semiconductor structures. The method includes the following steps: A substrate is provided. A plurality of first core features spaced apart from each other is formed over the substrate. A spacer layer is formed over the first core features, and the spacer layer is formed to cover sidewalls and top surfaces of each first core feature. A plurality of second core features is formed over the substrate, and portions of the spacer layer are exposed through the second core features. A densification treatment is performed on the second core features, and the spacer layer is removed to form a plurality of openings between the first core features and the second core features.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: December 4, 2018
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Shing-Yih Shih, Cheng-Wei Wang, Tzu-Li Tseng
  • Patent number: 9229546
    Abstract: A circuit of frequency counter is adapted for an electromagnetic board with an electromagnetic pen. The counter exemplarily includes a source count module, a motion count module, a logic module, a switching gate module, a signal-capturing module, a frequency-counting module and a control module. The source count module counts number of clock pulses of a first clock signal. A receiver mode is switched by the switching gate module when the number reaches a first predetermined value. The motion count module counts number of clock pulses of a second clock signal. A transmitter mode is made by the switching gate module when the number reaches a second predetermined value. When a cumulative number of circular number counted by the frequency-counting module reaches a third predetermined value, the frequency-counting module completes counting a first high-frequency clock signals, and the control module obtains an operating frequency for the electromagnetic pen.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: January 5, 2016
    Assignee: WALTOP INTERNATIONAL CORPORATION
    Inventors: Chia-Jui Yeh, Cheng-Wei Wang, In-koune Kao
  • Publication number: 20150301628
    Abstract: A circuit of frequency counter is adapted for an electromagnetic board with an electromagnetic pen. The counter exemplarily includes a source count module, a motion count module, a logic module, a switching gate module, a signal-capturing module, a frequency-counting module and a control module. The source count module counts number of clock pulses of a first clock signal. A receiver mode is switched by the switching gate module when the number reaches a first predetermined value. The motion count module counts number of clock pulses of a second clock signal. A transmitter mode is made by the switching gate module when the number reaches a second predetermined value. When a cumulative number of circular number counted by the frequency-counting module reaches a third predetermined value, the frequency-counting module completes counting a first high-frequency clock signals, and the control module obtains an operating frequency for the electromagnetic pen.
    Type: Application
    Filed: June 16, 2014
    Publication date: October 22, 2015
    Inventors: CHIA-JUI YEH, CHENG-WEI WANG, IN-KOUNE KAO
  • Patent number: 8814588
    Abstract: An electrical connector includes an insulating housing defining a mating slot, a plurality of conductive terminals retained in the insulating housing and a shielding shell attached to the insulating housing. The terminals include contacting portions exposed to the mating slot and solder portions. The shielding shell includes a pair of connecting portions integrally extending in the mating slot, a locking portion integrally extending from each connecting portion and exposed to the mating slot and a releasing portion integrally extending from each connecting portion to the shell with an operating portion at one outer side of the connector. The locking portions move away from the mating slot in response to a movement of the releasing portions to the mating slot.
    Type: Grant
    Filed: October 15, 2012
    Date of Patent: August 26, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Cheng-Wei Wang, Hsiu-Yuan Hsu
  • Patent number: 8478318
    Abstract: A control method for a heterogeneous wireless sensor network (WSN) bridging device includes initializing Zigbee sensor nodes, switching a Zigbee transceiver module to a sleep mode, switching a wireless network transceiver module to an active mode, receiving an task list from a remote main control device, switching the wireless network transceiver module to the sleep mode, switching the Zigbee transceiver module to the active mode, transmitting an operating instruction to the Zigbee sensor nodes, receiving at least one sensing signal from the Zigbee sensor nodes, and determining whether the sensing signals have been received. If yes, a back transmission procedure is executed. The control method solves an interference problem among heterogeneous wireless networks and overcomes a bottleneck in data transmission.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: July 2, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Li-Feng Tsai, Shih-Min Tzeng, Cheng-Wei Wang, Zhung-Xing Xiao
  • Patent number: 8479162
    Abstract: A method and apparatus for locating a memory leak in a program code by a computer device using a combination of dynamic analysis and static analysis approaches. The method includes dynamically analyzing the program to determine a memory leak characteristic; filtering out items which do not match the determined memory leak characteristic of the program to reduce a static analysis range to certain suspicious parts of a source code; and statically analyzing the suspicious parts of the program to locate the memory leak in the program. The apparatus includes a dynamic analyzer device to determine memory leak characteristics; and a static analyzer device to filter out items which do not match the determined memory leak characteristic to reduce a static analysis range to certain suspicious parts of a source code and locate the memory leak in the program.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: July 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ying Li, Tian Cheng Liu, Quan Long, Jing Luo, Cheng Wei Wang
  • Publication number: 20130095675
    Abstract: An electrical connector includes an insulating housing defining a mating slot, a plurality of conductive terminals retained in the insulating housing and a shielding shell attached to the insulating housing. The terminals include contacting portions exposed to the mating slot and solder portions. The shielding shell includes a pair of connecting portions integrally extending in the mating slot, a locking portion integrally extending from each connecting portion and exposed to the mating slot and a releasing portion integrally extending from each connecting portion to the shell with an operating portion at one outer side of the connector. The locking portions move away from the mating slot in response to a movement of the releasing portions to the mating slot.
    Type: Application
    Filed: October 15, 2012
    Publication date: April 18, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHENG-WEI WANG, HSIU-YUAN HSU
  • Patent number: 8311345
    Abstract: A method and system for detecting flames are provided. The flame detection method based on image processing techniques performs the following steps to detecting flames. It first finds one or more bright objects in the images that are captured from videos. A flickering state of a bright object is then determined. To verify the existence of a flame, additionally subsequent images from the instant that a bright object first appears are utilized and the similar steps are applied to them. Finally a flame could be detected if the analyzed results are positive after the aforementioned steps have been performed.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: November 13, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Hsin-Sen Chu, Chung-Hsien Lu, Shen-Kuen Chang, Hao-Ting Chao, Cheng-Wei Wang, Kun-Lin Huang
  • Patent number: 8159539
    Abstract: A smoke detecting method and system are provided. The smoke detecting method and system capture a plurality of images; determine whether a moving object exists in the plurality of images; select the images having the moving object to be analyzed; analyze whether the moving object is moving toward a specific direction and a displacement of a base point of the moving object; and determine the moving object as a smoke when the moving object is moving toward the specific direction and the displacement is less than a threshold value.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: April 17, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Hao-Ting Zhao, Chung-Hsien Lu, Shen-Kuen Chang, Cheng-Wei Wang, Kun-Lin Huang