Patents by Inventor Chengxin YIN

Chengxin YIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11853754
    Abstract: Provided is a mask operation method for an explicit independent mask register in a GPU. The method comprises: each GPU hardware thread being able to access respective eight 128-bit-wide independent mask registers, which are recorded as $m0-$m7. With regard to mask operation instructions of the explicit independent mask register in the GPU, each hardware thread in the GPU is able to access respective eight 128-bit-wide independent mask registers, and four groups of mask operation instructions are available for a user, and respectively realize a reduction operation, an extension operation and a logic operation on the mask register, and data movement between the mask register and a general vector register.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: December 26, 2023
    Inventors: Chengxin Yin, Lei Wang
  • Publication number: 20220236988
    Abstract: Provided is a mask operation method for an explicit independent mask register in a GPU. The method comprises: each GPU hardware thread being able to access respective eight 128-bit-wide independent mask registers, which are recorded as $m0-$m7. With regard to mask operation instructions of the explicit independent mask register in the GPU, each hardware thread in the GPU is able to access respective eight 128-bit-wide independent mask registers, and four groups of mask operation instructions are available for a user, and respectively realize a reduction operation, an extension operation and a logic operation on the mask register, and data movement between the mask register and a general vector register.
    Type: Application
    Filed: June 11, 2020
    Publication date: July 28, 2022
    Inventors: Chengxin YIN, Lei WANG
  • Patent number: 10353672
    Abstract: A method for computing trigonometric functions, performed by an ALU (Arithmetic Logic Unit) in coordination with an SFU (Special Function Unit), is introduced to contain at least the following steps. The ALU computes a remainder r and a reduction value x* corresponding to an input parameter x. The SFU computes an intermediate function f(x*) corresponding to the reduction value x*. The ALU computes a multiplication of the reduction value x* by the intermediate function f(x*) as the computation result of a trigonometric function.
    Type: Grant
    Filed: October 15, 2015
    Date of Patent: July 16, 2019
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: Wei Wang, Xinan Jiang, Chengxin Yin, Huaisheng Zhang, Tian Shen, Bing Yu
  • Publication number: 20170090871
    Abstract: A method for computing trigonometric functions, performed by an ALU (Arithmetic Logic Unit) in coordination with an SFU (Special Function Unit), is introduced to contain at least the following steps. The ALU computes a remainder r and a reduction value x* corresponding to an input parameter x. The SFU computes an intermediate function f(x*) corresponding to the reduction value x*. The ALU computes a multiplication of the reduction value x* by the intermediate function f(x*) as the computation result of a trigonometric function.
    Type: Application
    Filed: October 15, 2015
    Publication date: March 30, 2017
    Inventors: Wei WANG, Xinan JIANG, Chengxin YIN, Huaisheng ZHANG, Tian SHEN, Bing YU