Patents by Inventor Chengzhi LUO

Chengzhi LUO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250133826
    Abstract: The present disclosure provides a display panel and a mobile terminal, the display panel includes a substrate and a thin film transistor layer, the thin film transistor layer including a semiconductor layer, an insulating layer and a first metal layer, the insulating layer being disposed on the substrate and the semiconductor layer and covering the semiconductor layer, the first metal layer being disposed on the insulating layer, the insulating layer including at least one via hole, the first metal layer being connected to the semiconductor layer through the via hole, and an included angle between a sidewall of the via hole and a bottom surface of the insulating layer being greater than or equal to 85 degrees and less than or equal to 90 degrees.
    Type: Application
    Filed: August 30, 2022
    Publication date: April 24, 2025
    Inventors: Fei AI, Chengzhi LUO
  • Publication number: 20250113615
    Abstract: An embodiment of the present disclosure discloses an array substrate and a display panel; The array substrate has a display region and includes a substrate, and a thin film transistor layer on a side of the substrate. The thin film transistor layer includes a plurality of first thin film transistors arranged in a first direction, the first thin film transistors are located in the display region, the second gates of adjacent first thin film transistors are connected in the first direction, and the first gates of at least two first thin film transistors are arranged at intervals.
    Type: Application
    Filed: September 21, 2023
    Publication date: April 3, 2025
    Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventor: Chengzhi LUO
  • Publication number: 20250093712
    Abstract: The disclosure provides a display module and a display device. A front projection of a reflective light-shielding layer on a substrate and corresponding a display region is located within a coverage of a front projection of a black matrix on the substrate and corresponding to the display region, and a ratio of a front projection area of the reflective light-shielding layer on the substrate and corresponding to the display region to a front projection area of the black matrix on the substrate and corresponding to the display region is greater than 20%.
    Type: Application
    Filed: November 10, 2022
    Publication date: March 20, 2025
    Inventor: Chengzhi LUO
  • Patent number: 12253772
    Abstract: A display panel and a display device are provided. The display panel includes a non-opening region and opening regions. The display panel includes a substrate. The substrate is located on a side of the display panel away from a light-exiting surface. The substrate includes a first base layer, a second base layer, and a third base layer. A first interface is formed between the second base layer and the first base layer. A second interface is formed between the third base layer and the second base layer.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: March 18, 2025
    Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventor: Chengzhi Luo
  • Publication number: 20250085582
    Abstract: A display panel and an electronic terminal are provided, including a plurality of opening areas, an array substrate, a color filter substrate positioned opposite to the array substrate, a backlight module arranged on one side of the array substrate away from the color filter substrate; and an optical layer disposed in at least one of the color filter substrate and the array substrate. The color filter substrate includes color resist portions in the respective opening areas. The optical layer is configured to converge light and is arranged corresponding to the color resist portions.
    Type: Application
    Filed: June 29, 2023
    Publication date: March 13, 2025
    Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventors: Guiyang ZHANG, Jiuhui ZHU, Chengzhi LUO, Pengfei ZHANG, Rui HE, Guowei ZHA, Guanghui LIU
  • Publication number: 20250089363
    Abstract: The present disclosure provides semiconductor devices. A first active layer is disposed on a substrate. A first insulation layer covers the first active layer and is provided with a first via hole. A second active layer is disposed on the first insulation layer. A third active layer is disposed in the first via hole and connects the first active layer and the second active layer, so that a channel length of the semiconductor device is determined by a thickness of the first insulation layer, and a channel width of the semiconductor device is determined by a circumference of the first via hole.
    Type: Application
    Filed: June 29, 2023
    Publication date: March 13, 2025
    Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventors: Zhifu LI, Guanghui LIU, Fei AI, Chengzhi LUO
  • Publication number: 20250081522
    Abstract: The present application provides a thin film transistor and an electronic device thereof. An active layer of the thin film transistor includes: a first active layer, a channel layer and a second active layer that are stacked, the first active layer includes a first doped portion and a second doped portion, the first doped portion is connected to the channel layer and the second doped portion, and a concentration of dopant ions in the first doped portion is less than a concentration of dopant ions in the second doped portion. The leakage current is reduced, and the mobility in the “channel region” of the thin film transistor is improved.
    Type: Application
    Filed: June 29, 2023
    Publication date: March 6, 2025
    Applicant: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhifu LI, Guanghui LIU, Fei AI, Dewei SONG, Chengzhi LUO
  • Publication number: 20250081755
    Abstract: A display panel and an electronic terminal are provided, including a substrate and a first thin film transistor (TFT) disposed on the substrate. The first TFT includes a first active portion, and a first source and a first drain which are arranged on two ends of the first active portion and electrically connected to the two ends. The display panel also includes a pixel electrode layer arranged on a first source-drain portion and electrically connected to the first drain. A material of the first drain includes a transparent conductive material.
    Type: Application
    Filed: June 30, 2023
    Publication date: March 6, 2025
    Inventors: Fei AI, Dewei SONG, Chengzhi LUO
  • Publication number: 20250035981
    Abstract: The present disclosure provides a display panel and a display device including the display panel. The display panel includes an array substrate including a light inlet side and a light outlet side oppositely arranged, including a plurality of opening regions for passing though light and a plurality of non-opening regions in addition to the plurality of opening regions, and including an insulation structure. The insulation structure includes a first groove located in the opening regions, recessed in a direction from the light outlet side toward the light inlet side, and filled with insulation materials. The insulation materials include a first insulation layer and a second insulation layer disposed on one side of the first insulation layer close to the light inlet side. The second insulation layer has a refractive index less than a refractive index of the first insulation layer.
    Type: Application
    Filed: October 15, 2024
    Publication date: January 30, 2025
    Inventors: Fei AI, Dewei SONG, Chengzhi LUO
  • Patent number: 12164195
    Abstract: A display panel and a manufacturing method thereof, and a display device are provided. The display panel includes a backlight module and an array substrate. The array substrate includes an insulation structure is located in the opening region. A first groove is defined at a side of the insulation structure away from the backlight module. A first insulation layer and a second insulation layer are filled in the first groove. The second insulation layer is located on a side of the first insulation layer close to the backlight module, and a refractive index of the second insulation layer is less than a refractive index of the first insulation layer.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: December 10, 2024
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Fei Ai, Dewei Song, Chengzhi Luo
  • Patent number: 12148839
    Abstract: The present application provides a semiconductor device and an electronic device. In the semiconductor device, a metal layer is provided on the side of the active layer facing the buffer layer, and the metal layer includes at least one metal block, so that the metal block is in direct contact with at least part of the active layer, then when the active layer is converted from amorphous silicon to polycrystalline silicon, due to the catalytic effect of the metal block, the size of the crystal grains in the polycrystalline silicon becomes larger, which reduces the crystal grain boundaries in the polycrystalline silicon and improves the mobility of the semiconductor device.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: November 19, 2024
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Chengzhi Luo
  • Publication number: 20240363640
    Abstract: A display panel and a display device are provided. The display panel includes: an active layer, a gate, and a gate auxiliary structure. The active layer is disposed along a first direction and includes a channel layer. The gate is disposed above the channel layer and a width of the gate along the first direction is equal to a length of the channel layer along the first direction. The gate auxiliary structure is disposed adjacent to the gate. The width of the gate along the first direction is less than 1 micrometer.
    Type: Application
    Filed: November 29, 2023
    Publication date: October 31, 2024
    Inventors: Fei AI, Dewei SONG, Chengzhi LUO
  • Patent number: 12107094
    Abstract: An array substrate and a display panel are provided. The array substrate includes a plurality of recess-shaped light-shielding patterns. An oxide semiconductor layer is correspondingly formed in a recess of one of the light-shielding patterns. In comparison with increasing a plane area for improving light-shielding performance of the light-shielding patterns, an area of an orthographic projection of the recess-shaped light-shielding patterns on the array substrate is smaller. Therefore, an area of a light-transmitting region of the array substrate is greater, thereby increasing an aperture of the array substrate.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: October 1, 2024
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Chengzhi Luo
  • Publication number: 20240258340
    Abstract: A display panel and an array substrate are provided. The array substrate includes a first thin film transistor of a vertical structure. The first TFT includes a first source, an interlayer insulating layer, a first gate, a first drain, and a first active layer. The interlayer insulating layer covers the first source. A hole penetrates the interlayer insulating layer. The first gate is embedded in the interlayer insulating layer. The first drain is disposed on a side of the insulating layer away from the first source. The first active layer connects to the first source and the first drain via the hole.
    Type: Application
    Filed: October 29, 2021
    Publication date: August 1, 2024
    Inventor: Chengzhi LUO
  • Publication number: 20240234577
    Abstract: A semiconductor device and an electronic device are provided. A through hole is formed in an insulating layer and located on a first active layer. A thin-film transistor layer includes a third active layer. At least part of the third active layer is located on a sidewall of the through hole. One side of the third active layer is connected to a first active layer, and the other side of the third active layer is connected to a second active layer, so that a channel length is reduced, short channel effect is reduced, on-state current is increased, and power consumption is reduced.
    Type: Application
    Filed: November 11, 2022
    Publication date: July 11, 2024
    Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventors: Zhifu LI, Guanghui LIU, Chao DAI, Fei AI, Dewei SONG, Chengzhi LUO
  • Publication number: 20240234576
    Abstract: The present application provides a thin-film transistor having a vertical structure and an electronic device. In the thin-film transistor having the vertical structure, the thin-film transistor includes a first doped portion and a second portion, the second doped portion is connected to and partly in contact with a channel portion through a via hole by arranging the second doped portion in the via hole of an insulating layer, which can reduce a contact area between the second doped portion and the channel portion, thereby reducing ions diffusing into a channel region and improving device stability of the thin-film transistor. Also, in the thin-film transistor having the vertical structure, a projection area of the thin-film transistor can be reduced, improving an aperture ratio of a display panel.
    Type: Application
    Filed: November 4, 2022
    Publication date: July 11, 2024
    Inventors: Zhifu LI, Guanghui LIU, Fei AI, Dewei SONG, Chengzhi LUO
  • Publication number: 20240219784
    Abstract: A display panel and a display device are provided. The display panel includes a non-opening region and opening regions. The display panel includes a substrate. The substrate is located on a side of the display panel away from a light-exiting surface. The substrate includes a first base layer, a second base layer, and a third base layer. A first interface is formed between the second base layer and the first base layer. A second interface is formed between the third base layer and the second base layer.
    Type: Application
    Filed: November 3, 2022
    Publication date: July 4, 2024
    Inventor: Chengzhi LUO
  • Publication number: 20240186420
    Abstract: The present application provides a semiconductor device and an electronic device. In the semiconductor device, a metal layer is provided on the side of the active layer facing the buffer layer, and the metal layer includes at least one metal block, so that the metal block is in direct contact with at least part of the active layer, then when the active layer is converted from amorphous silicon to polycrystalline silicon, due to the catalytic effect of the metal block, the size of the crystal grains in the polycrystalline silicon becomes larger, which reduces the crystal grain boundaries in the polycrystalline silicon and improves the mobility of the semiconductor device.
    Type: Application
    Filed: July 28, 2022
    Publication date: June 6, 2024
    Inventor: Chengzhi LUO
  • Publication number: 20240069381
    Abstract: A display panel and a manufacturing method thereof, and a display device are provided. The display panel includes a backlight module and an array substrate. The array substrate includes an insulation structure is located in the opening region. A first groove is defined at a side of the insulation structure away from the backlight module. A first insulation layer and a second insulation layer are filled in the first groove. The second insulation layer is located on a side of the first insulation layer close to the backlight module, and a refractive index of the second insulation layer is less than a refractive index of the first insulation layer.
    Type: Application
    Filed: November 8, 2022
    Publication date: February 29, 2024
    Inventors: Fei AI, Dewei SONG, Chengzhi LUO
  • Publication number: 20240038765
    Abstract: An array substrate and a display panel are provided. The array substrate includes a substrate, an array layer, an inorganic insulation layer, a conductive electrode, a passivation layer, and a pixel electrode disposed in sequence. The array layer includes a source electrode and a drain electrode. A first via hole is defined in the array substrate. The first via hole penetrates the passivation layer and the inorganic insulation layer and exposes the drain electrode. The pixel electrode is connected to the drain electrode in the first via hole.
    Type: Application
    Filed: December 9, 2021
    Publication date: February 1, 2024
    Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventors: Fei AI, Dewei SONG, Chengzhi LUO