Patents by Inventor Chenhao Geng

Chenhao Geng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit memory devices having asynchronous flow-through capability
    Patent number: 7093083
    Abstract: Asynchronous memory devices utilize loopback circuitry to provide efficient and high speed “flow-through” of write data when conventional flow-through operations are not available. An exemplary memory device includes a memory array having first and second ports that can each support asynchronous read and write access and a first input/output control circuit. The first input/output control circuit is electrically coupled to the first port and includes a first sense amplifier, which is configured to receive read data from the first port, and a first bypass latch having an output coupled to the first sense amplifier. A second input/output control circuit is also provided. The second input/output control circuit is electrically coupled to the second port and includes a second sense amplifier, which is configured to receive read data from the second port, and a second bypass latch.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: August 15, 2006
    Assignee: Integrated Device Technology, Inc.
    Inventors: Frank Matthews, Chenhao Geng, Jessica Ye
  • Integrated circuit memory devices having asynchronous flow-through capability
    Patent number: 6934816
    Abstract: Asynchronous memory devices utilize loopback circuitry to provide efficient and high speed “flow-through” of write data when conventional flow-through operations are not available. An exemplary memory device includes a memory array having first and second ports that can each support asynchronous read and write access and a first input/output control circuit. The first input/output control circuit is electrically coupled to the first port and includes a first sense amplifier, which is configured to receive read data from the first port, and a first bypass latch having an output coupled to the first sense amplifier. A second input/output control circuit is also provided. The second input/output control circuit is electrically coupled to the second port and includes a second sense amplifier, which is configured to receive read data from the second port, and a second bypass latch.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: August 23, 2005
    Assignee: Integrated Device Technology, Inc.
    Inventors: Frank Matthews, Chenhao Geng, Jessica Ye
  • Integrated circuit memory devices having asynchronous flow-through capability
    Publication number: 20030037208
    Abstract: Asynchronous memory devices utilize preferred loopback operations to provide efficient and high speed “flow-through” of write data when conventional flow-through operations are not available. An integrated circuit memory device includes a memory array having first and second ports that can each support asynchronous read and write access and a first input/output control circuit. The first input/output control circuit is electrically coupled to the first port and includes a first sense amplifier configured to receive read data from the first port and a first bypass latch having an output coupled to the first sense amplifier. A second input/output control circuit is also provided. The second input/output control circuit is electrically coupled to the second port and includes a second sense amplifier, configured to receive read data from the second port, and a second bypass latch.
    Type: Application
    Filed: December 18, 2001
    Publication date: February 20, 2003
    Inventors: Frank Matthews, Chenhao Geng, Jessica Ye