Patents by Inventor Chen-Hui Huang

Chen-Hui Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128216
    Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 18, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Ching-Chun Wang, Hsiao-Hui Tseng, Chen-Jong Wang, Dun-Nian Yaung
  • Patent number: 11961919
    Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate, where a top portion of the fin comprises a layer stack that includes alternating layers of a first semiconductor material and a second semiconductor material; forming a dummy gate structure over the fin; forming openings in the fin on opposing sides of the dummy gate structure; forming source/drain regions in the openings; removing the dummy gate structure to expose the first semiconductor material and the second semiconductor material under the dummy gate structure; performing a first etching process to selectively remove the exposed first semiconductor material, where after the first etching process, the exposed second semiconductor material form nanostructures, where each of the nanostructures has a first shape; and after the first etching process, performing a second etching process to reshape each of the nanostructures into a second shape different from the first shape.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chung Chang, Hsiu-Hao Tsao, Ming-Jhe Sie, Shun-Hui Yang, Chen-Huang Huang, An Chyi Wei, Ryan Chia-Jen Chen
  • Publication number: 20240103220
    Abstract: A device includes a first package connected to an interconnect substrate, wherein the interconnect substrate includes conductive routing; and a second package connected to the interconnect substrate, wherein the second package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler and to a photodetector; a via extending through the substrate; an interconnect structure over the photonic layer, wherein the interconnect structure is connected to the photodetector and to the via; and an electronic die bonded to the interconnect structure, wherein the electronic die is connected to the interconnect structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Inventors: Chen-Hua Yu, Hsing-Kuo Hsia, Kuo-Chiang Ting, Sung-Hui Huang, Shang-Yun Hou, Chi-Hsi Wu
  • Publication number: 20240004374
    Abstract: A fault detection method comprises the following steps. Receiving a first original sequence comprising a plurality of first data. Receiving a second original sequence comprising a plurality of second data. Aligning the first original sequence with the second original sequence according to trends of value changing of the first data and the second data. Performing an average operation on the aligned first original sequence and second original sequence to establish a standard sequence. Performing a difference operation between the first original sequence and the standard sequence to obtain a first total difference value. Performing a difference operation between the second original sequence and the standard sequence to obtain a second total difference value. When the first total difference value and/or the second total difference value is greater than an upper limit value, determining that the first original sequence and/or the second total difference value is abnormal.
    Type: Application
    Filed: July 27, 2022
    Publication date: January 4, 2024
    Inventors: Yung-Yu YANG, Kang-Ping LI, Chih-Kuan CHANG, Chung-Chih HUNG, Chen-Hui HUANG, Nai-Ying LO, Shih-Wei HUANG
  • Patent number: 11821847
    Abstract: A wafer backside defect detection method and a wafer backside defect detection apparatus are provided. The wafer backside defect detection method includes the following steps. A peripheral edge area of a wafer backside image that at least one notch is located is cropped off. Adjacent white pixels on the wafer backside image are connected to obtain a plurality of abnormal regions. If a total area of top N of the abnormal regions is more than 10% of an area of the wafer, it is deemed that the wafer has a roughness defect. N is a natural number. If the total area of the top N of the abnormal regions is less than 1% of the area of the wafer and a largest abnormal region of the abnormal regions is longer than a predetermined length, it is deemed that the wafer has a scratch defect.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: November 21, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Hsien Chen, Chia-Feng Hsiao, Chung-Hsuan Wu, Chen-Hui Huang, Nai-Ying Lo, En-Wei Tsui, Yung-Yu Yang, Chen-Hsuan Hung
  • Patent number: 11644427
    Abstract: An automatic detection method and an automatic detection system for detecting any crack on wafer edges are provided. The automatic detection method includes the following steps. Several wafer images of several wafers are obtained. The wafer images are integrated to create a templet image. Each of the wafer images is compared with the templet image to obtain a differential image. Each of the differential images is binarized. Each of the differential images which are binarized is de-noised. Whether each of the differential images has an edge crack is detected according to pattern of each of the differential images which are de-noised.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: May 9, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Feng Hsiao, Chung-Hsuan Wu, Shuo-Yu Chen, Nai-Ying Lo, Yi-Hui Tseng, Chen-Hui Huang, Yung-Yu Yang, Tzu-Ping Kao
  • Publication number: 20230024259
    Abstract: A wafer backside defect detection method and a wafer backside defect detection apparatus are provided. The wafer backside defect detection method includes the following steps. A peripheral edge area of a wafer backside image that at least one notch is located is cropped off. Adjacent white pixels on the wafer backside image are connected to obtain a plurality of abnormal regions. If a total area of top N of the abnormal regions is more than 10% of an area of the wafer, it is deemed that the wafer has a roughness defect. N is a natural number. If the total area of the top N of the abnormal regions is less than 1% of the area of the wafer and a largest abnormal region of the abnormal regions is longer than a predetermined length, it is deemed that the wafer has a scratch defect.
    Type: Application
    Filed: July 20, 2021
    Publication date: January 26, 2023
    Inventors: Cheng-Hsien CHEN, Chia-Feng HSIAO, Chung-Hsuan WU, Chen-Hui HUANG, Nai-Ying LO, En-Wei TSUI, Yung-Yu YANG, Chen-Hsuan HUNG
  • Patent number: 11327798
    Abstract: An application level request associated with a portion of an application code requested to be executed with an adjusted hardware acceleration (wherein the portion of the application code is identified using a mechanism compatible with a plurality of different hardware processors) is received. It is determined whether to allow the adjusted hardware acceleration based at least in part on a configuration received via a network.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: May 10, 2022
    Assignee: Meta Platforms, Inc.
    Inventors: Anamaria Cotirlea, Chen-Hui Huang
  • Publication number: 20220128485
    Abstract: An automatic detection method and an automatic detection system for detecting any crack on wafer edges are provided. The automatic detection method includes the following steps. Several wafer images of several wafers are obtained. The wafer images are integrated to create a templet image. Each of the wafer images is compared with the templet image to obtain a differential image. Each of the differential images is binarized. Each of the differential images which are binarized is de-noised. Whether each of the differential images has an edge crack is detected according to pattern of each of the differential images which are de-noised.
    Type: Application
    Filed: November 23, 2020
    Publication date: April 28, 2022
    Inventors: Chia-Feng HSIAO, Chung-Hsuan WU, Shuo-Yu CHEN, Nai-Ying LO, Yi-Hui TSENG, Chen-Hui HUANG, Yung-Yu YANG, Tzu-Ping KAO
  • Patent number: 11151724
    Abstract: An automatic detecting method and an automatic detecting apparatus using the same are provided. The automatic detecting apparatus includes an inputting unit, a dividing unit, a contouring unit, a range analyzing unit, a boundary analyzing unit, an edge detecting unit, an expanding unit and an overlapping unit. The dividing unit is used for dividing an overlooking image into four clusters via a clustering algorithm. The contouring unit is used for obtaining a contour. The range analyzing unit is used for obtaining a detecting range. The boundary analyzing unit is used for obtaining a circular boundary in the detecting range. The edge detecting unit is used for obtaining a plurality of edges in the circular boundary. The expanding unit is used for expanding the edges to obtain a plurality of expanded edges. The overlapping unit is used for overlapping the expanded edges and the contour to obtain a defect pattern.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: October 19, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tzu-Ping Kao, Ching-Hsing Hsieh, Chia-Chi Chang, Ju-Te Chen, Chen-Hui Huang, Cheng-Hsien Chen
  • Publication number: 20200380693
    Abstract: An automatic detecting method and an automatic detecting apparatus using the same are provided. The automatic detecting apparatus includes an inputting unit, a dividing unit, a contouring unit, a range analyzing unit, a boundary analyzing unit, an edge detecting unit, an expanding unit and an overlapping unit. The dividing unit is used for dividing an overlooking image into four clusters via a clustering algorithm. The contouring unit is used for obtaining a contour. The range analyzing unit is used for obtaining a detecting range. The boundary analyzing unit is used for obtaining a circular boundary in the detecting range. The edge detecting unit is used for obtaining a plurality of edges in the circular boundary. The expanding unit is used for expanding the edges to obtain a plurality of expanded edges. The overlapping unit is used for overlapping the expanded edges and the contour to obtain a defect pattern.
    Type: Application
    Filed: June 3, 2019
    Publication date: December 3, 2020
    Inventors: Tzu-Ping KAO, Ching-Hsing HSIEH, Chia-Chi CHANG, Ju-Te CHEN, Chen-Hui HUANG, Cheng-Hsien CHEN
  • Publication number: 20160031056
    Abstract: A method of a fault detection and classification (FDC) may be used to determine outlier tools from a plurality of tools. The method includes generating a plurality of parameter charts, generating a plurality of group charts according to the plurality of parameter charts, generating a score table according to the plurality of group charts, determining outlier tools according to the score table, and performing tool correction on the outlier tools.
    Type: Application
    Filed: August 4, 2014
    Publication date: February 4, 2016
    Inventors: Feng-Chi Chung, Ching-Hsing Hsieh, Chen-Hui Huang, Hsin-Kun Chu
  • Patent number: 8356689
    Abstract: An improved structure for the compositely formed sound box consists of a plastic-made box with one-way opening and intensified rib and inlet components provided inside the box. The main feature is the bubbled one-piece soundproof layer inside the sound box to expand the overall structure of the sound box, reduce the thickness of the sound box, minimize the thickness of the shell, and upgrade the soundproof performance at the same time.
    Type: Grant
    Filed: August 6, 2001
    Date of Patent: January 22, 2013
    Assignee: Harman International Industries, Inc.
    Inventor: Chen-Hui Huang
  • Publication number: 20110088965
    Abstract: An improved structure for the compositely formed sound box consists of a plastic-made box with one-way opening and intensified rib and inlet components provided inside the box. The main feature is the bubbled one-piece soundproof layer inside the sound box to expand the overall structure of the sound box, reduce the thickness of the sound box, minimize the thickness of the shell, and upgrade the soundproof performance at the same time.
    Type: Application
    Filed: August 6, 2001
    Publication date: April 21, 2011
    Inventor: Chen-Hui Huang
  • Publication number: 20070049426
    Abstract: A batting tee for baseball is comprised of a base, a height adjustable post erected on the base, a mechanical box containing a swing mechanism and a return mechanism being disposed at the top of the post, a rod being axially erected from one side of the swing mechanical box, a baseball being connected to the top of the rod; a swing for a preset angle being achieved when the baseball is stricken; the baseball returning to its standby position for next swing practice without spinning for 360° to pay better efficiency and results of swing practice by eliminating the return problem of the prior art.
    Type: Application
    Filed: August 31, 2005
    Publication date: March 1, 2007
    Inventor: Chen-Hui Huang
  • Publication number: 20070010353
    Abstract: A batting tee for baseball and softball; adjustable depending on the size and age of the individual player; safer to use; portable; and allowing intensive training is essentially comprised of an “L”-shaped tee, a telescoping and fordable leg and serving unit; linking unit is disposed between the telescoping leg and the serving unit; or a column made of resilient material to hold the ball being directly inserted onto the serving unit; and a ball feeder connected to the linking unit being externally inserted to the serving unit.
    Type: Application
    Filed: July 7, 2005
    Publication date: January 11, 2007
    Inventor: Chen-Hui Huang
  • Patent number: 7096995
    Abstract: The invention provides a loudspeaker system having a housing made of a plastic casing and a foam positioned against the interior walls of the casing through a reaction between the foam and the interior wall. The foam increases the stiffness of the walls as well as provides sound damping. Additionally, the foam may create a foam rib between a stud and the casing to support the stud and transfer the stiffness of the stud to a wall of the casing.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: August 29, 2006
    Assignee: Harman International Industries, Incorporated
    Inventors: David H. Cox, Chen-Hui Huang
  • Publication number: 20040069561
    Abstract: The invention provides a loudspeaker system having a housing made of a plastic casing and a foam positioned against the interior walls of the casing through a reaction between the foam and the interior wall. The foam increases the stiffness of the walls as well as provides sound damping. Additionally, the foam may create a foam rib between a stud and the casing to support the stud and transfer the stiffness of the stud to a wall of the casing.
    Type: Application
    Filed: June 4, 2003
    Publication date: April 15, 2004
    Inventors: David H. Cox, Chen-Hui Huang