Abstract: A temperature-compensated low-pass filter includes a differential amplifier that controls a first transistor to pass a subthreshold current through the transistor to charge a capacitor with low-pass-filtered output voltage. A second transistor has a first terminal coupled to an input terminal of the low-pass filter and has a second terminal coupled to a current source conducting a bias current. The differential amplifier also controls the second transistor to conduct the bias current responsive to a difference between a complementary-to-absolute-temperature reference voltage and a voltage of the second terminal of the second transistor.

Abstract: A method and apparatus for reducing the amount of jitter in a signal are disclosed. In one embodiment a feed-forward loop compares the edges of a reference clock and an input signal, converts a time difference of the compared edges into a voltage signal, and controls a time delay in a voltage controlled delay line in order to reduce or eliminate jitter.

Abstract: A method and apparatus for reducing the amount of jitter in a signal are disclosed. In one embodiment a feed-forward loop compares the edges of a reference clock and an input signal, converts a time difference of the compared edges into a voltage signal, and controls a time delay in a voltage controlled delay line in order to reduce or eliminate jitter.

Abstract: A temperature compensation technique is provided for a non-volatile memory arrangement. The memory arrangement includes: a memory circuit (12) having a floating gate transistor (P3) operating in weak-inversion mode and a varactor (Cv) with a terminal electrically coupled to a gate node of the floating gate transistor; a first current reference circuit (14) having a floating gate transistor (PI); a second current reference circuit (16) having a floating gate transistor (P2); and a control module (18) configured to selectively receive a reference current (I1, I2) from a drain of the floating gate transistor in each of the first and second current reference circuits. The control module operates to determine a ratio between the reference currents received from the first and second current reference circuits, generate a tuning voltage (Vx) in accordance with the ratio between the reference currents and apply the tuning voltage to the varactor in the memory circuit.

Abstract: A differential class-D amplifier module having common-mode swing limiter circuit is disclosed. The differential class-D amplifier module may include differential class-D amplifier configured to generate differential pulse width modulated (PWM) output signals based on differential input signals and at least a portion of the differential PWM output signals that are fed back to the differential class-D amplifier. The common-mode swing limiter circuit may attenuate one or more common-mode signal components associated with the PWM output signals that may be fed back to input terminals of the differential class-D amplifier.

Abstract: In an aspect of the disclosure, a class D power amplifier with an overcurrent protection (OCP) circuit is provided. The class D power amplifier includes a plurality of output transistors, and the OCP circuit is mirrored to at least one output transistor of the plurality of output transistors in a closed-loop feedback configuration for precisely controlling a sensing current of the OCP circuit with respect to an output current of the at least one output transistor. The class D power amplifier with the OCP circuit in the closed-loop feedback configuration mitigates a variation in a current threshold value for triggering interruption of the class D power amplifier.

Abstract: A class D power amplifier is provided. The class D power amplifier includes a class D driver circuit having a plurality of output transistors, at least one active clamp circuit coupled to at least one output transistor of the plurality of output transistors, and at least one filter bank circuit coupled to the at least one active clamp circuit for controlling a voltage of the at least one output transistor. Accordingly, a voltage across a drain node and source node (VDS), a voltage across a gate node and source node (VGS), and a voltage across the gate node and drain node (VGD) of the output transistors is reduced to increase reliability of the power amplifier while consuming less power and utilizing less die area.

Abstract: A temperature compensation technique is provided for a non-volatile memory arrangement. The memory arrangement includes: a memory circuit (12) having a floating gate transistor (P3) operating in weak-inversion mode and a varactor (Cv) with a terminal electrically coupled to a gate node of the floating gate transistor; a first current reference circuit (14) having a floating gate transistor (PI); a second current reference circuit (16) having a floating gate transistor (P2); and a control module (18) configured to selectively receive a reference current (I1, I2) from a drain of the floating gate transistor in each of the first and second current reference circuits. The control module operates to determine a ratio between the reference currents received from the first and second current reference circuits, generate a tuning voltage (Vx) in accordance with the ratio between the reference currents and apply the tuning voltage to the varactor in the memory circuit.

Abstract: A class D power amplifier is provided. The class D power amplifier includes a class D driver circuit having a plurality of output transistors, at least one active clamp circuit coupled to at least one output transistor of the plurality of output transistors, and at least one filter bank circuit coupled to the at least one active clamp circuit for controlling a voltage of the at least one output transistor. Accordingly, a voltage across a drain node and source node (VDS), a voltage across a gate node and source node (VGS), and a voltage across the gate node and drain node (VGD) of the output transistors is reduced to increase reliability of the power amplifier while consuming less power and utilizing less die area.

Abstract: In an aspect of the disclosure, a class D power amplifier with an overcurrent protection (OCP) circuit is provided. The class D power amplifier includes a plurality of output transistors, and the OCP circuit is mirrored to at least one output transistor of the plurality of output transistors in a closed-loop feedback configuration for precisely controlling a sensing current of the OCP circuit with respect to an output current of the at least one output transistor. The class D power amplifier with the OCP circuit in the closed-loop feedback configuration mitigates a variation in a current threshold value for triggering interruption of the class D power amplifier.