Patents by Inventor Chenrong QIAO
Chenrong QIAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12216370Abstract: A display panel is provided, which includes a first substrate and a second substrate arranged opposite to each other. The first substrate includes a first electrode and a second electrode. The second substrate includes a light shielding layer. The light shielding layer includes a light transmitting region and a light shielding region. The first electrode includes slits extending in a first direction, and an orthographic projection of two ends of at least one of the slits onto the first substrate is within an orthographic projection of the light shielding region onto the first substrate. A display panel and a display device are also provided.Type: GrantFiled: May 11, 2022Date of Patent: February 4, 2025Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Jing Li, Yanan Yu, Zhao Liu, Rui Fan, Xiao Yan, Haoyi Xin, Jianxiong Fan, Shangpeng Liu, Jingjing Xu, Min Zhang, Wei Ren, Chenrong Qiao, Yanfeng Li
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Publication number: 20240411184Abstract: An array substrate includes a substrate, signal lines, conductive bumps, an insulating layer, and thin film transistors each including a gate, source, and drain. The conductive blocks are disposed on a portion of the substrate located in a bonding region. The insulating layer is located between every two adjacent conductive bumps. A distance from a surface of a conductive metal layer included in a conductive bump away from the substrate to the substrate is less than or equal to a distance from a surface of the insulating layer away from the substrate to the substrate. The gate and signal lines are disposed in a same layer. The conductive metal layer is disposed in a same layer as the source and drain. On the substrate, an orthogonal projection of the conductive metal layer is located within an orthogonal projection of a signal line connected to the conductive metal layer.Type: ApplicationFiled: August 22, 2024Publication date: December 12, 2024Inventors: Yanyong SONG, Yanfeng LI, Haoyi XIN, Xu QIAO, Chenrong QIAO, Wei REN, Yu XING, Jingjing XU, Rula SHA, Guolei ZHI, Guangshuai WANG, Liwen XIN, Jingwei HOU
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Patent number: 12105383Abstract: An array substrate has a display area and a bezel area located on at least one side of the display area. The bezel area includes a bonding region. The array substrate includes a substrate, a plurality of signal lines, a plurality of conductive bumps, and an insulating layer. The signal lines are disposed on the substrate. The conductive blocks are disposed on a portion of the substrate located in the bonding region, and a conductive bump is connected to at least one signal line. The insulating layer covers the plurality of signal lines and is located between every two adjacent conductive bumps. The conductive bump includes a conductive metal layer. A distance from a surface of the conductive metal layer away from the substrate to the substrate is less than or equal to a distance from a surface of the insulating layer away from the substrate to the substrate.Type: GrantFiled: April 14, 2021Date of Patent: October 1, 2024Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yanyong Song, Yanfeng Li, Haoyi Xin, Xu Qiao, Chenrong Qiao, Wei Ren, Yu Xing, Jingjing Xu, Rula Sha, Guolei Zhi, Guangshuai Wang, Liwen Xin, Jingwei Hou
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Publication number: 20240288735Abstract: A display panel is provided, which includes a first substrate and a second substrate arranged opposite to each other. The first substrate includes a first electrode and a second electrode. The second substrate includes a light shielding layer. The light shielding layer includes a light transmitting region and a light shielding region. The first electrode includes slits extending in a first direction, and an orthographic projection of two ends of at least one of the slits onto the first substrate is within an orthographic projection of the light shielding region onto the first substrate. A display panel and a display device are also provided.Type: ApplicationFiled: May 11, 2022Publication date: August 29, 2024Applicants: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Jing Li, Yanan Yu, Zhao Liu, Rui Fan, Xiao Yan, Haoyi Xin, Jianxiong Fan, Shangpeng Liu, Jingjing Xu, Min Zhang, Wei Ren, Chenrong Qiao, Yanfeng Li
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Patent number: 12072586Abstract: A pixel electrode, including: a plurality of strip-shaped first electrodes, where the plurality of the first electrodes are arranged along a first direction, each of the first electrodes extends along a second direction, and the second direction intersects with the first direction; a second electrode, where the second electrode is connected to first ends of the plurality of first electrodes, and the first ends of the plurality of first electrodes are connected through the second electrode; and a third electrode, where the third electrode is connected to a second end of at least one of the first electrodes, and a direction of an electric field of an area in which the third electrode is disposed intersects with both the first direction and the second direction.Type: GrantFiled: December 11, 2020Date of Patent: August 27, 2024Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Wei Ren, Wei Li, Yanfeng Li, Haoyi Xin, Jing Li, Jingjing Xu, Chenrong Qiao, Yanyong Song, Xu Qiao, Rula Sha, Min Zhang
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Publication number: 20240170503Abstract: An array substrate, a liquid crystal display panel and a display apparatus. The array substrate comprises: a substrate (10), a first insulating layer (20), a second insulating layer (30), a third insulating layer (40), a planarization layer (50), a first electrode layer (90A), a fourth insulating layer (70) and a second electrode layer (90B), the third insulating layer comprises a first interlayer insulating layer (40A), a second interlayer insulating layer (40B) and a third interlayer insulating layer (40C), which are sequentially stacked; the first interlayer insulating layer is located on the side of the second interlayer insulating layer close to the substrate (10), the third interlayer insulating layer is located on the side of the second interlayer insulating layer away from the substrate; the material of the first interlayer insulating layer and third interlayer insulating layer comprises silicon oxide, the material of the second interlayer insulating layer comprises silicon nitride.Type: ApplicationFiled: October 31, 2022Publication date: May 23, 2024Inventors: Haoyi XIN, Wei LI, Yanfeng LI, Jingjing XU, Min ZHANG, Rui FAN, Chenrong QIAO, Xiao YAN, Zhao LIU, Jing LI, Jianxiong FAN, Shangpeng LIU, Haidong SU
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Publication number: 20230296942Abstract: A pixel electrode, including: a plurality of strip-shaped first electrodes, where the plurality of the first electrodes are arranged along a first direction, each of the first electrodes extends along a second direction, and the second direction intersects with the first direction; a second electrode, where the second electrode is connected to first ends of the plurality of first electrodes, and the first ends of the plurality of first electrodes are connected through the second electrode; and a third electrode, where the third electrode is connected to a second end of at least one of the first electrodes, and a direction of an electric field of an area in which the third electrode is disposed intersects with both the first direction and the second direction.Type: ApplicationFiled: December 11, 2020Publication date: September 21, 2023Inventors: Wei REN, Wei LI, Yanfeng LI, Haoyi XIN, Jing LI, Jingjing XU, Chenrong QIAO, Yanyong SONG, Xu QIAO, Rula SHA, Min ZHANG
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Publication number: 20230047799Abstract: Provided is a pixel structure. The pixel structure includes: a first electrode, a second electrode, and a liquid crystal layer that are disposed on one side of a substrate and successively stacked, wherein one of the first electrode and the second electrode is a pixel electrode and the other of the first electrode and the second electrode is a common electrode, and the second electrode includes a plurality of electrode branches sequentially arranged in a first direction, wherein each of the electrode branches includes a first end portion, a body portion, and a second end portion that are successively connected in a second direction, the body portion including at least one body segment.Type: ApplicationFiled: October 28, 2022Publication date: February 16, 2023Inventors: Wei REN, Wei LI, Yanfeng LI, Haoyi XIN, Jing LI, Jingjing XU, Chenrong QIAO, Yanyong SONG, Xu QIAO, Rula SHA, Min ZHANG
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Publication number: 20220291538Abstract: An array substrate has a display area and a bezel area located on at least one side of the display area. The bezel area includes a bonding region. The array substrate includes a substrate, a plurality of signal lines, a plurality of conductive bumps, and an insulating layer. The signal lines are disposed on the substrate. The conductive blocks are disposed on a portion of the substrate located in the bonding region, and a conductive bump is connected to at least one signal line. The insulating layer covers the plurality of signal lines and is located between every two adjacent conductive bumps. The conductive bump includes a conductive metal layer. A distance from a surface of the conductive metal layer away from the substrate to the substrate is less than or equal to a distance from a surface of the insulating layer away from the substrate to the substrate.Type: ApplicationFiled: April 14, 2021Publication date: September 15, 2022Applicants: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yanyong SONG, Yanfeng LI, Haoyi XIN, Xu QIAO, Chenrong QIAO, Wei REN, Yu XING, Jingjing XU, Rula SHA, Guolei ZHI, Guangshuai WANG, Liwen XIN, Jingwei HOU