Patents by Inventor Chenting Lin

Chenting Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080108203
    Abstract: An interconnect includes an opening formed in a dielectric layer. A conductive barrier is deposited in the opening, over which a first conductive layer is deposited. A conductive oxide is deposited over the first conductive layer, and a second conductive layer, formed from the same material as the first conductive layer, is deposited over the conductive liner.
    Type: Application
    Filed: January 10, 2008
    Publication date: May 8, 2008
    Inventors: Jingyu Lian, Chenting Lin, Nicolas Nagel, Micheal Wise
  • Patent number: 7319270
    Abstract: An interconnect includes an opening formed in a dielectric layer. A conductive barrier is deposited in the opening, over which a first conductive layer is deposited. A conductive oxide is deposited over the first conductive layer, and a second conductive layer, formed from the same material as the first conductive layer, is deposited over the conductive liner.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: January 15, 2008
    Assignee: Infineon Technologies AG
    Inventors: Jingyu Lian, Chenting Lin, Nicolas Nagel, Michael Wise
  • Patent number: 6943113
    Abstract: A two-step chemical mechanical polishing (CMP) process is provided to minimize (reduce) dishing of metal lines in trenches in an insulation (oxide) layer of each of a plurality of semiconductor wafers during fabrication thereof. For each wafer, the first step involves CMP of a metal layer disposed on the oxide layer and having a lower portion located in the trenches for forming metal lines and an upper portion overlying the lower portion. The first step polishing uses a first polishing pad to remove the bulk of the metal layer upper portion while generating concomitant CMP residue, and leaves a minimized (reduced) remainder of the metal layer upper portion without dishing of the metal layer lower portion in the trenches. The second step continues the CMP with a second polishing pad to remove the remainder of the metal layer upper portion with minimized (reduced) dishing of the metal layer lower portion to an extent providing the metal lines as individual metal lines in the trenches.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: September 13, 2005
    Assignee: Infineon Technologies AG
    Inventors: Chenting Lin, Robert Ploessl
  • Publication number: 20050196917
    Abstract: A method for forming high capacitance crystalline dielectric layers with (111) texture is disclosed. In an exemplary embodiment, deposition of a plurality of nuclei is performed at a temperature in the range of about 430 to 460 degrees Celsius, followed by growth of a continuous BSTO dielectric layer at a temperature greater than 600 degrees Celsius. In an exemplary embodiment, a process is disclosed for growing a barium strontium titanium oxide film with high capacitance and thickness of about 30 nm or less.
    Type: Application
    Filed: March 3, 2004
    Publication date: September 8, 2005
    Inventors: Jingyu Lian, David Kotecki, Hua Shen, Robert Laibowitz, Katherine Saenger, Chenting Lin, Nicolas Nagel, Yunyu Wang, Satish Athavale, Thomas Shaw
  • Publication number: 20050023590
    Abstract: A multi-layer electrode (246) and method of fabrication thereof in which a conductive region (244) is separated from a barrier layer (222) by a first conductive liner (240) and a second conductive liner (242). First conductive layer (240) comprises Pt, and second conductive liner (242) comprises a thin layer of conductive oxide. The multi-layer electrode (246) prevents oxygen diffusion through the top conductive region (244) and reduces material variation during electrode patterning.
    Type: Application
    Filed: August 30, 2004
    Publication date: February 3, 2005
    Inventors: Jingyu Lian, Chenting Lin, Nicolas Nagel, Michael Wise
  • Patent number: 6794705
    Abstract: A multi-layer electrode (246) and method of fabrication thereof in which a conductive region (244) is separated from a barrier layer (222) by a first conductive liner (240) and a second conductive liner (242). First conductive layer (240) comprises Pt, and second conductive liner (242) comprises a thin layer of conductive oxide. The multi-layer electrode (246) prevents oxygen diffusion through the top conductive region (244) and reduces material variation during electrode patterning.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: September 21, 2004
    Assignee: Infineon Technologies AG
    Inventors: Jingyu Lian, Chenting Lin, Nicolas Nagel, Michael Wise
  • Patent number: 6685796
    Abstract: Improved CMP uniformity is achieved by providing improved control of the slurry distribution. Improved slurry distribution is achieved by, for example, the use of a slurry dispenser that dispenses slurry from a plurality of dispensing points. Providing a squeeze bar between the slurry dispenser and wafer to redistribute the slurry also improves the slurry distribution.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: February 3, 2004
    Assignee: Infineon Technologies AG
    Inventors: Chenting Lin, Robert van den Berg, Sumit Pandey
  • Patent number: 6459709
    Abstract: A wavelength-tunable distributed feedback (DFB) laser is disclosed where the lasing wavelength can be adjusted by adjusting the bias current of the laser diode. Since the output power of the laser diode also changes with the bias current, a one-to-one correspondence between the lasing wavelength and the output power of the laser can be established. Consequently, the lasing wavelength can be measured directly from the photocurrent of a power monitoring detector facing the back-end of the laser diode. This provides an extremely simple method for wavelength monitoring.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: October 1, 2002
    Assignee: Nova Crystals, Inc.
    Inventors: Yu-Hwa Lo, Steven Gregg Hummel, Chenting Lin, Chau-Hong Kuo, Mei-Ling Shek-Stefan, Sergey V. Zaytsev
  • Patent number: 6432725
    Abstract: A method for forming a crystalline dielectric layer deposits an amorphous metallic oxide dielectric layer on a surface. The amorphous metallic oxide dielectric layer is treated with a plasma at a temperature of less than or equal to 400 degrees Celsius to form a crystalline layer.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: August 13, 2002
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Jingyu Lian, Kwong Hon Wong, Katherine Saenger, Chenting Lin
  • Patent number: 6429131
    Abstract: Improved CMP uniformity is achieved by providing improved control of the slurry distribution. Improved slurry distribution is achieved by, for example, the use of a slurry dispenser that dispenses slurry from a plurality of dispensing points. Providing a squeeze bar between the slurry dispenser and wafer to redistribute the slurry also improves the slurry distribution.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: August 6, 2002
    Assignee: Infineon Technologies AG
    Inventors: Chenting Lin, Robert van den Berg, Sumit Pandey
  • Publication number: 20020101898
    Abstract: A wavelength-tunable distributed feedback (DFB) laser is disclosed where the lasing wavelength can be adjusted by adjusting the bias current of the laser diode. Since the output power of the laser diode also changes with the bias current, a one-to-one correspondence between the lasing wavelength and the output power of the laser can be established. Consequently, the lasing wavelength can be measured directly from the photocurrent of a power monitoring detector facing the back-end of the laser diode. This provides an extremely simple method for wavelength monitoring.
    Type: Application
    Filed: January 31, 2001
    Publication date: August 1, 2002
    Applicant: Nova Crystals, Inc.
    Inventors: Yu-Hwa Lo, Steven Gregg Hummel, Chenting Lin, Chau-Hong Kuo, Mei-Ling Shek-Stefan, Sergey V. Zaytsev
  • Patent number: 6420267
    Abstract: A method of forming an integrated barrier/contact for stacked capacitors is provided which results in reduced cost of ownership and in a barrier which is nominally several times thicker than convention structures. The resulting structure results in decreased contact plug resistance as compared with conventional devices.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: July 16, 2002
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Chenting Lin, Ronald J. Schutz, Andreas Knorr, Keith Wong, Hua Shen, Jenny Lian
  • Publication number: 20020084481
    Abstract: A multi-layer electrode (246) and method of fabrication thereof in which a conductive region (244) is separated from a barrier layer (222) by a first conductive liner (240) and a second conductive liner (242). First conductive layer (240) comprises Pt, and second conductive liner (242) comprises a thin layer of conductive oxide. The multi-layer electrode (246) prevents oxygen diffusion through the top conductive region (244) and reduces material variation during electrode patterning.
    Type: Application
    Filed: December 28, 2000
    Publication date: July 4, 2002
    Inventors: Jingyu Lian, Chenting Lin, Nicolas Nagel, Michael Wise
  • Patent number: 6413866
    Abstract: A method of enriching the surface of a substrate with a solute material that was originally dissolved in the substrate material, to yield a uniform dispersion of the solute material at the substrate surface. The method generally entails the use of a solvent material that is more reactive than the solute material to a chosen reactive agent. The surface of the substrate is reacted with the reactive agent to preferentially form a reaction compound of the solvent material at the surface of the substrate. As the compound layer develops, the solute material segregates or diffuses out of the compound layer and into the underlying substrate, such that the region of the substrate nearest the compound layer becomes enriched with the solute material. At least a portion of the compound layer is then removed without removing the underlying enriched region of the substrate.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: July 2, 2002
    Assignee: International Business Machines Corporation
    Inventors: Horatio S. Wildman, Lawrence A. Clevenger, Chenting Lin, Kenneth P. Rodbell, Stefan Weber, Roy C. Iggulden, Maria Ronay, Florian Schnabel
  • Patent number: 6339007
    Abstract: A capacitor structure that comprises a top platinum electrode and a bottom electrode having insulator on the sidewalls of the electrodes, and wherein the bottom electrode is from depositing a first electrode portion being recessed with respect to the insulator on the sidewalls thereof and depositing a second insulator portion is provided.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: January 15, 2002
    Assignee: International Business Machines Corporation
    Inventors: Yun-Yu Wang, Rajarao Jammy, Lee J. Kimball, David E. Kotecki, Jenny Lian, Chenting Lin, John A. Miller, Nicholas Nagel, Hua Shen, Horatio S. Wildman
  • Publication number: 20020003824
    Abstract: A semiconductor surface-emitting laser device has a lasing section and a beam-deflecting section. The two sections are assembled adjacent to each other in close optical and physical proximity. The lasing section includes a horizontal laser cavity having faceted ends. The cavity emits horizontally propagating a light beam through one faceted end into the adjoining beam-deflecting section. The beam-deflecting section includes two mirror surfaces. The two mirror surfaces are oriented such that the horizontally propagating light beam is redirected to propagate vertically toward the top surface of the laser device by sequential reflections off of the two mirrors. A beam-shaping micro-optics lens is disposed on the top surface of the beam-deflecting section. The micro-optic lens collimates the vertically propagating redirected light beam to generate an output beam emitted from the top surface of the laser device.
    Type: Application
    Filed: May 31, 2001
    Publication date: January 10, 2002
    Inventors: Yu-Hwa Lo, Zuhua Zhu, Chenting Lin
  • Publication number: 20010034134
    Abstract: Improved CMP uniformity is achieved by providing improved control of the slurry distribution. Improved slurry distribution is achieved by, for example, the use of a slurry dispenser that dispenses slurry from a plurality of dispensing points. Providing a squeeze bar between the slurry dispenser and wafer to redistribute the slurry also improves the slurry distribution.
    Type: Application
    Filed: March 18, 1999
    Publication date: October 25, 2001
    Inventors: CHENTING LIN, ROBERT VAN DEN BERG, SUMIT PANDEY
  • Patent number: 6281114
    Abstract: A process is provided for planarization of an insulation layer, e.g., of silicon dioxide, on a semiconductor wafer, e.g., of silicon, and having a surface with a downwardly stepped chemically mechanically polished arrangement of metal lines in the insulation layer between intervening insulation portions. A first pattern portion of metal lines is separated by intervening insulation portions and defines a first pattern factor having a first value, and an adjacent second pattern portion of metal lines is separated by intervening insulation portions and defines a second pattern factor having a second value different from the first value. The second pattern portion is at a step depth relative to the insulation layer surface different from that of the first pattern portion relative to such layer surface.
    Type: Grant
    Filed: February 7, 2000
    Date of Patent: August 28, 2001
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Chenting Lin, Larry Clevenger, Ranier Florian Schnabel
  • Patent number: 6222220
    Abstract: A stacked capacitor, in accordance with the present invention includes a conductive plug disposed within a trench for connecting to an access device. A barrier is formed on the plug and is disposed within the trench. A dielectric layer is formed over the trench, the dielectric layer forming a hole therethrough exposing at least a portion of the barrier. A first electrode is formed within the hole and extends from the hole. A capacitor dielectric layer is formed on the first electrode and separating the first electrode from a second electrode, and the dielectric layer and the first electrode substantially prevent chemical interactions between materials of the barrier and materials of the capacitor dielectric layer and an oxidizing environment used to form the capacitor dielectric layer. A method of fabrication is also included.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: April 24, 2001
    Assignee: Siemens Aktiengesellschaft
    Inventors: Chenting Lin, Andreas Knorr
  • Patent number: 6132294
    Abstract: In accordance with the present invention, a method is disclosed for releasing semiconductor wafers from a polishing pad. The method includes the steps of applying a slurry to a polishing pad, rotating the polishing pad having slurry thereon while applying pressure against a wafer such that the wafer is polished by the slurry, introducing water to the polishing pad, increasing the rotational speed of the polishing pad to remove a portion of the slurry, decreasing the pressure during the step of increasing rotational speed to substantially prevent further polishing and removing the wafer from the polishing pad.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: October 17, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventor: Chenting Lin