Abstract: This application discloses a graph computing method and apparatus, so that concurrent graph computing performed by using a plurality of algorithms can be supported. A plurality of subgraphs of a graph are loaded into a plurality of computing units, and the plurality of computing units execute a plurality of algorithms in parallel, so that a same graph can be shared by the plurality of algorithms, and the plurality of algorithms are executed in parallel on the same graph. In this way, a delay caused when one algorithm needs to executed after execution of another algorithm ends is saved, so that overall efficiency of performing graph computing by using the plurality of algorithms is improved, and overall time of performing graph computing by using the plurality of algorithms is shortened.

Abstract: A method may include executing operation types on a concurrent data structure to obtain executed operations. Each executed operation may cause a transition from a preceding state to a subsequent state. The method may further include recording each executed operation to obtain recorded operations, and assembling a concurrent history from the recorded operations. The concurrent history may include a subset of the recorded operations, and the concurrent history may impose overlapping and non-overlapping relationships on the subset of recorded operations. The method may further include checking whether the concurrent history has an equivalent linearization including a total sequential ordering of the subset of recorded operations, and reporting an error when the concurrent history has no equivalent linearization.

Abstract: A flash memory apparatus for controlling storage of data comprises a plurality of blocks for storing data and a controller. Each block includes a plurality of pages. The controller receives first target data and identifies a first block to store the first target data. Then, the controller divides the first target data into two parts. A size of a first part is equal to the available capacity of the first block. And a size of a second part is equal to the size of the first target data minus the size of the first part. The controller further determines a second block that has stored data but is not full. At last, the controller writes the first part into the first block and write the second part into the second block.

Abstract: According to a write data request processing method and a storage array provided in the embodiments of the present invention, a controller is connected to a cache device via a switching device, an input/output manager is connected to the controller via the switching device, and the input/output manager is connected to a cache device via the switching device. The controller obtains a cache address from the cache device for to-be-written data according to the write data request, the controller sends an identifier of the cache device and the cache address to the input/output manager via the switching device, and the input/output manager writes the to-be-written data to the cache address via the switching device.

Abstract: According to a write data request processing method and a storage array provided in the embodiments of the present invention, a controller is connected to a cache device via a switching device, an input/output manager is connected to the controller via the switching device, and the input/output manager is connected to a cache device via the switching device. The controller obtains a cache address from the cache device for to-be-written data according to the write data request, the controller sends an identifier of the cache device and the cache address to the input/output manager via the switching device, and the input/output manager writes the to-be-written data to the cache address via the switching device.

Abstract: A method may include executing operation types on a concurrent data structure to obtain executed operations. Each executed operation may cause a transition from a preceding state to a subsequent state. The method may further include recording each executed operation to obtain recorded operations, and assembling a concurrent history from the recorded operations. The concurrent history may include a subset of the recorded operations, and the concurrent history may impose overlapping and non-overlapping relationships on the subset of recorded operations. The method may further include checking whether the concurrent history has an equivalent linearization including a total sequential ordering of the subset of recorded operations, and reporting an error when the concurrent history has no equivalent linearization.

Abstract: According to a write data request processing method and a storage array provided in the embodiments of the present invention, a controller is connected to a cache device via a switching device, an input/output manager is connected to the controller via the switching device, and the input/output manager is connected to a cache device via the switching device. The controller obtains a cache address from the cache device for to-be-written data according to the write data request, the controller sends an identifier of the cache device and the cache address to the input/output manager via the switching device, and the input/output manager writes the to-be-written data to the cache address via the switching device.

Abstract: According to a data deduplication system and method for a storage array is provided in embodiments of the present invention, where a controller is connected to a cache device via a switching device, the cache device calculates an eigenvalue of a to-be-deduplicated data block, the controller queries an eigenvalue index set of data blocks according to the eigenvalue of the to-be-deduplicated data block, and when the same eigenvalue is not found, the controller sends a cache address of the to-be-deduplicated data block in the cache device to a controller of a target storage unit such as a hard disk drive, and the controller of the target hard disk reads the to-be-deduplicated data block from the cache address of the data block.

Abstract: A flash memory apparatus for controlling storage of data comprises a plurality of blocks for storing data and a controller. Each block includes a plurality of pages. The controller receives first target data and identifies a first block to store the first target data. Then, the controller divides the first target data into two parts. A size of a first part is equal to the available capacity of the first block. And a size of a second part is equal to the size of the first target data minus the size of the first part. The controller further determines a second block that has stored data but is not full. At last, the controller writes the first part into the first block and write the second part into the second block.

Abstract: A storage controller for determining an amount of data to be sent to a flash memory apparatus for storage comprises a communications interface for communicating with the flash memory apparatus and a processor. The flash memory apparatus comprises a block including a plurality of pages. And at least one of the pages is unavailable for storage. The processor is configured to receive information of the block sent by the flash memory apparatus, wherein the information includes capacity of one or more unavailable pages in the block. And then, the processor determines an available capacity of the block, based on the information and a total capacity of the block. Further, the processor obtains data to be sent to the flash memory apparatus, wherein an amount of the data is equal to the available capacity of the block. At last, the processor sends the data to the flash memory apparatus.

Abstract: A method for detecting user input dependence in software code. The method including representing the software code with a reachability graph having: a plurality of nodes, where a root node of the plurality of nodes represents an input controlled by a user; a first directed edge connecting a first node of the plurality of nodes and a second node of the plurality of nodes, where the first directed edge represents a data dependency; and a second directed edge connecting a third node of the plurality of nodes and a fourth node of the plurality of nodes, wherein the second directed edge represents a data dependency. The method also includes identifying a fifth node of the plurality of nodes as a reachable node from the root node by traversing the reachability graph from the root node to the reachable node; and marking a portion of the software code represented by the reachable node as user input dependant.

Abstract: A method for detecting user input dependence in software code. The method including representing the software code with a reachability graph having: a plurality of nodes, where a root node of the plurality of nodes represents an input controlled by a user; a first directed edge connecting a first node of the plurality of nodes and a second node of the plurality of nodes, where the first directed edge represents a data dependency; and a second directed edge connecting a third node of the plurality of nodes and a fourth node of the plurality of nodes, wherein the second directed edge represents a data dependency. The method also includes identifying a fifth node of the plurality of nodes as a reachable node from the root node by traversing the reachability graph from the root node to the reachable node; and marking a portion of the software code represented by the reachable node as user input dependant.