Patents by Inventor Cheol-Hee Moon

Cheol-Hee Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050093448
    Abstract: A plasma display panel minimizing the presence of electrodes outside the display area. In forming the display electrodes across the display, the electrodes extend to only one of the right or left side of the display area. In forming the address electrodes, the electrodes extend to only one of a top or a bottom side of the display area. By so limiting the amount of electrodes outside the display area, less electrode paste is consumed thus reducing expenses and the size of the glass substrate is reduced thus resulting in a more compact display. All of this can be achieved without reducing the display area of the display.
    Type: Application
    Filed: November 1, 2004
    Publication date: May 5, 2005
    Inventors: Cheol-Hee Moon, Chang-Seok Rho
  • Publication number: 20050077823
    Abstract: A plasma display panel that has electrode extending to a periphery thereof with a thickness and width that varies from the thickness and width of other electrode portions to enhance electrode resistance efficiency and discharge characteristics. That is, the electrodes in the display extend through a display area where visible images are generated into a non-display area around the display area where a connection to a driving circuit is made. The electrodes are designed to have varying widths and thicknesses that vary depending on whether the electrode is inside the display area or is outside the display area.
    Type: Application
    Filed: October 8, 2004
    Publication date: April 14, 2005
    Inventors: Young-Hwa Song, Seung-Heon Oh, Chang-Seok Rho, Cheol-Hee Moon
  • Publication number: 20050067957
    Abstract: A plasma display panel includes a front substrate and a rear substrate opposing one another; display electrodes formed on the front substrate, a dielectric layer formed on the front substrate covering the display electrodes, barrier ribs formed on the rear substrate and including first barrier rib members formed in a direction orthogonal to the display electrodes, and second barrier rib members formed in a direction parallel to the display electrodes, the first barrier rib members intersecting the second barrier rib members to define discharge cells; phosphor layers formed in the discharge cells, and address electrodes realized through conductive wires and coated with a dielectric material, the address electrodes being formed orthogonal to the display electrodes in the discharge cells. The address electrodes may be mounted on the second barrier rib members orthogonal to the display electrodes in the discharge cells.
    Type: Application
    Filed: September 25, 2003
    Publication date: March 31, 2005
    Inventor: Cheol-Hee Moon
  • Publication number: 20050023980
    Abstract: A plasma display panel includes a first substrate and a second substrate opposing one another with a predetermined gap therebetween. Address electrodes are formed on the first substrate. Also, barrier ribs are mounted in the gap between the first substrate and the second substrate, and define discharge cells in a predetermined display region of the first and second substrates. Phosphor layers are formed in the discharge cells. Further, scanning electrodes and display electrodes are formed on the second substrate. The scanning electrodes and the display electrodes each have a pitch in the display region that is identical to a pitch in terminal regions, which are formed to the outside of the display region.
    Type: Application
    Filed: July 24, 2004
    Publication date: February 3, 2005
    Inventor: Cheol-Hee Moon
  • Publication number: 20040000873
    Abstract: The present invention provides a plasma display panel and a method for manufacturing barrier ribs for the plasma display panel. The plasma display panel includes first and second substrates that have a predetermined gap therebetween. A plurality of parallel address electrodes are formed on the first substrate. A dielectric layer is formed on the first substrate covering the address electrodes and barrier ribs are formed on the dielectric layer in a lattice pattern. Discharge sustain electrodes are formed on the second substrate which is perpendicular to the address electrodes, and a transparent dielectric layer and a protection layer are formed on the second substrate covering the discharge sustain electrodes. The barrier ribs are, for example, first and second barrier rib members which are formed respectively in the same direction as the address electrodes and the discharge sustain electrodes.
    Type: Application
    Filed: June 27, 2003
    Publication date: January 1, 2004
    Inventor: Cheol-Hee Moon
  • Patent number: 6650051
    Abstract: In a plasma display panel, a scanning electrode and a common electrode are alternately formed in strips and parallel to one another on a lower surface of a front substrate. A bus electrode is formed on lower surfaces of the respective scanning and common electrodes to have a narrower width than that of each of the scanning and common electrodes. A black matrix layer is formed of the same insulative material to be parallel to the electrodes at a boundary area between neighboring discharge cells, in which each cell is constituted by a discharge space including a pair of the scanning electrode and the common electrode, and between the scanning and common electrodes and the bus electrode, on a lower surface of the front substrate.
    Type: Grant
    Filed: February 25, 2000
    Date of Patent: November 18, 2003
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Chang-bae Park, Young-cheul Kang, Cheol-hee Moon
  • Patent number: 6495958
    Abstract: A plasma display panel including upper and lower substrates which are opposite to each other, a pair of upper electrodes formed to be spaced apart from each other on the lower surface of the upper substrate, a first dielectric layer coated on the lower surface of the upper substrate to bury the upper electrodes, partition walls installed to be spaced apart from each other on the lower substrate, for defining discharge spaces, lower electrodes formed of conductive wires on the upper substrate in the discharge spaces so as to be orthogonal to the upper electrodes, and a phosphor layer coated in the discharge spaces.
    Type: Grant
    Filed: June 16, 1999
    Date of Patent: December 17, 2002
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Cheol-hee Moon