Patents by Inventor Cheol Hoon Yang
Cheol Hoon Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150207018Abstract: Disclosed is an apparatus and method for manufacturing a thin film type solar cell, which enables the enhancement of productivity, the apparatus for manufacturing a thin film type solar cell including a first electrode forming unit; a first separation part; an optoelectric conversion layer forming unit; a contact line forming unit; a printing unit; and an etching process unit, wherein the etching process unit removes the optoelectric conversion layer in a second separation part to expose the first electrode in the second separation part through a wet etching process.Type: ApplicationFiled: March 31, 2015Publication date: July 23, 2015Applicant: JUSUNG ENGINEERING CO., LTD.Inventor: Cheol Hoon YANG
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Patent number: 9018034Abstract: Disclosed is an apparatus and method for manufacturing a thin film type solar cell, which enables the enhancement of productivity, the apparatus for manufacturing a thin film type solar cell including a first electrode forming unit; a first separation part; an optoelectric conversion layer forming unit; a contact line forming unit; a printing unit; and an etching process unit, wherein the etching process unit removes the optoelectric conversion layer in a second separation part to expose the first electrode in the second separation part through a wet etching process.Type: GrantFiled: September 8, 2011Date of Patent: April 28, 2015Assignee: Jusung Engineering Co., Ltd.Inventor: Cheol Hoon Yang
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Patent number: 8298852Abstract: A thin film type solar cell and a method for manufacturing the same is disclosed, which is capable of providing a wide light-transmission area without lowering cell efficiency and increasing processing time, so that the solar cell can be used as a substitute for a glass window in a building. The thin film type solar cell generally comprises a substrate; a plurality of front electrodes at fixed intervals on the substrate; a plurality of semiconductor layers at fixed intervals with a contact portion or separating channel interposed in-between, the plurality of semiconductor layers on the plurality of front electrodes; and a plurality of rear electrodes at fixed intervals by the each separating channel interposed in-between, the each rear electrode being electrically connected with the each front electrode; wherein the each rear electrode is patterned in such a way that a light-transmitting portion is included in a predetermined portion of the rear electrode.Type: GrantFiled: July 10, 2009Date of Patent: October 30, 2012Assignee: Jusung Engineering Co., Ltd.Inventors: Yong Woo Shin, Won Hyun Kim, Dae Yup Na, Hyun Jun Cho, Dong Woo Kang, Doo Young Kim, Hyun Kyo Shin, Cheol Hoon Yang
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Publication number: 20120129321Abstract: A semiconductor device manufacturing apparatus includes a chamber including a reaction space, a substrate disposing unit configured to dispose a substrate within the chamber, a first heating unit configured to optically heat the reaction space and disposed under the chamber, a second heating unit configured to heat the reaction space through resistive heating and disposed over the chamber, and a plasma generating unit configured to generate plasma in the reaction space. Since the apparatus generates the plasma using the plasma generating unit disposed over the chamber, the deposition process based on heating and the etch process based on the plasma can be simultaneously performed in one single chamber.Type: ApplicationFiled: January 30, 2012Publication date: May 24, 2012Applicant: JUSUNG ENGINEERING CO., LTDInventors: Cheol Hoon YANG, Kyu Jin CHOI, Yong Han JEON, Euy Kyu LEE, Tae Wan LEE
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Patent number: 8168505Abstract: A method of fabricating a transistor is provided. The transistor includes a SiGe epitaxial layer formed in a recess region of a substrate at both side of a gate electrode and a SiGe capping layer formed on the SiGe epitaxial layer. The transistor further includes a SiGe seed layer formed under the SiGe epitaxial layer and a silicon capping layer formed on the SiGe capping layer.Type: GrantFiled: May 13, 2011Date of Patent: May 1, 2012Assignee: Jusung Engineering Co., Ltd.Inventors: Cheol Hoon Yang, Yong Han Jeon
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Publication number: 20120064660Abstract: Disclosed is an apparatus and method for manufacturing a thin film type solar cell, which enables the enhancement of productivity, the apparatus for manufacturing a thin film type solar cell including a first electrode forming unit; a first separation part; an optoelectric conversion layer forming unit; a contact line forming unit; a printing unit; and an etching process unit, wherein the etching process unit removes the optoelectric conversion layer in a second separation part to expose the first electrode in the second separation part through a wet etching process.Type: ApplicationFiled: September 8, 2011Publication date: March 15, 2012Inventor: Cheol Hoon YANG
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Patent number: 8097527Abstract: A method of forming an epitaxial layer on a silicon substrate includes (a) providing a silicon substrate; (b) performing a wet-cleaning process onto the silicon substrate; (c) performing a first plasma cleaning process onto the wet-cleaned silicon substrate by providing a chlorine (Cl2) gas and an argon (Ar) gas; and (d) forming an epitaxial growth film on the silicon substrate after the (c) step.Type: GrantFiled: July 10, 2008Date of Patent: January 17, 2012Assignee: Jusung Engineering Co. Ltd.Inventor: Cheol-Hoon Yang
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Patent number: 8057987Abstract: The invention relates to a patterning method of a semiconductor device. In an aspect of the invention, the method may include forming a target etch layer on a semiconductor substrate, forming a photoresist film on the target etch layer, forming photoresist patterns using exposure and development processes employing an exposure mask wherein exposure patterns, each having inclined top corners, are formed, and patterning the target etch layer using an etch process employing the photoresist patterns.Type: GrantFiled: October 22, 2008Date of Patent: November 15, 2011Assignee: Hynix Semiconductor Inc.Inventor: Cheol Hoon Yang
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Publication number: 20110212604Abstract: A method of fabricating a transistor is provided. The transistor includes a SiGe epitaxial layer formed in a recess region of a substrate at both side of a gate electrode and a SiGe capping layer formed on the SiGe epitaxial layer. The transistor further includes a SiGe seed layer formed under the SiGe epitaxial layer and a silicon capping layer formed on the SiGe capping layer.Type: ApplicationFiled: May 13, 2011Publication date: September 1, 2011Applicant: Jusung Engineering CO., LTD.Inventors: Cheol Hoon YANG, Yong Han JEON
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Patent number: 7955987Abstract: An exposure mask and a method of forming a contact hole of a semiconductor device using the same, in which micro patterns can be formed are disclosed herein. In an aspect, an exposure mask method includes a mask substrate, a light-shield pattern formed on the mask substrate, and a transparent pattern in which a plurality of patterns, which are limited to the light-shield pattern and have different short-direction widths and long-direction widths, form a group which is repeatedly arranged. Accordingly, micro photoresist patterns can be formed uniformly.Type: GrantFiled: June 29, 2007Date of Patent: June 7, 2011Assignee: Shin & KimInventor: Cheol Hoon Yang
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Patent number: 7943969Abstract: A transistor and a method of fabricating the same are provided. The transistor includes a SiGe epitaxial layer formed in a recess region of a substrate at both side of a gate electrode and a SiGe capping layer formed on the SiGe epitaxial layer. The transistor further includes a SiGe seed layer formed under the SiGe epitaxial layer and a silicon capping layer formed on the SiGe capping layer.Type: GrantFiled: October 27, 2008Date of Patent: May 17, 2011Assignee: Jusung Engineering Co. Ltd.Inventors: Cheol Hoon Yang, Yong Han Jeon
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Publication number: 20100167458Abstract: A thin film type solar cell and a method for manufacturing the same is disclosed, which is capable of providing a wide light-transmission area without lowering cell efficiency and increasing processing time, so that the solar cell can be used as a substitute for a glass window in a building. The thin film type solar cell generally comprises a substrate; a plurality of front electrodes at fixed intervals on the substrate; a plurality of semiconductor layers at fixed intervals with a contact portion or separating channel interposed in-between, the plurality of semiconductor layers on the plurality of front electrodes; and a plurality of rear electrodes at fixed intervals by the each separating channel interposed in-between, the each rear electrode being electrically connected with the each front electrode; wherein the each rear electrode is patterned in such a way that a light-transmitting portion is included in a predetermined portion of the rear electrode.Type: ApplicationFiled: July 10, 2009Publication date: July 1, 2010Inventors: Yong Woo Shin, Woo-Hyun Kim, Dae Yup Na, Hyun Jun Cho, Dong Woo Kang, Doo Young Kim, Hyun Kyo Shin, Cheol Hoon Yang
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Publication number: 20100101730Abstract: A substrate processing apparatus, which is designed to prevent the wobbling of a rotational shaft rotating, is provided. The substrate includes a rotation shaft and a connecting member. A unit is disposed between the rotational shaft and the connecting member to make the rotational shaft and the connecting member close-contact each other or a unit is disposed under the rotational shaft to prevent the wobbling of the rotational shaft.Type: ApplicationFiled: October 21, 2009Publication date: April 29, 2010Applicant: JUSUNG ENGINEERING CO., LTD.Inventors: Kyu Jin CHOI, Sung Min NA, Euy Kyu LEE, Yong Han JEON, Cheol Hoon YANG, Tae Wan LEE, Uk HWANG, Sun Kee KIM
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Publication number: 20100006539Abstract: A semiconductor device manufacturing apparatus includes a chamber including a reaction space, a substrate disposing unit configured to dispose a substrate within the chamber, a first heating unit configured to optically heat the reaction space and disposed under the chamber, a second heating unit configured to heat the reaction space through resistive heating and disposed over the chamber, and a plasma generating unit configured to generate plasma in the reaction space. Since the apparatus generates the plasma using the plasma generating unit disposed over the chamber, the deposition process based on heating and the etch process based on the plasma can be simultaneously performed in one single chamber.Type: ApplicationFiled: October 27, 2008Publication date: January 14, 2010Applicant: JUSUNG ENGINEERING CO., LTDInventors: Cheol Hoon YANG, Kyu Jin CHOI, Yong Han JEON, Euy Kyu LEE, Tae Wan LEE
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Publication number: 20090111059Abstract: The invention relates to a patterning method of a semiconductor device. In an aspect of the invention, the method may include forming a target etch layer on a semiconductor substrate, forming a photoresist film on the target etch layer, forming photoresist patterns using exposure and development processes employing an exposure mask wherein exposure patterns, each having inclined top corners, are formed, and patterning the target etch layer using an etch process employing the photoresist patterns.Type: ApplicationFiled: October 22, 2008Publication date: April 30, 2009Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Cheol Hoon Yang
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Publication number: 20090108308Abstract: A transistor and a method of fabricating the same are provided. The transistor includes a SiGe epitaxial layer formed in a recess region of a substrate at both side of a gate electrode and a SiGe capping layer formed on the SiGe epitaxial layer. The transistor further includes a SiGe seed layer formed under the SiGe epitaxial layer and a silicon capping layer formed on the SiGe capping layer.Type: ApplicationFiled: October 27, 2008Publication date: April 30, 2009Applicant: JUSUNG ENGINEERING CO., LTDInventors: Cheol Hoon YANG, Yong Han JEON
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Publication number: 20090017603Abstract: A method of forming an epitaxial layer on a silicon substrate includes (a) providing a silicon substrate; (b) performing a wet-cleaning process onto the silicon substrate; (c) performing a first plasma cleaning process onto the wet-cleaned silicon substrate by providing a chlorine (Cl2) gas and an argon (Ar) gas; and (d) forming an epitaxial growth film on the silicon substrate after the (c) step.Type: ApplicationFiled: July 10, 2008Publication date: January 15, 2009Applicant: Jusung Engineering Co., Ltd.Inventor: Cheol-Hoon Yang
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Publication number: 20080280443Abstract: An exposure mask and a method of forming a contact hole of a semiconductor device using the same, in which micro patterns can be formed are disclosed herein. In an aspect, an exposure mask method includes a mask substrate, a light-shield pattern formed on the mask substrate, and a transparent pattern in which a plurality of patterns, which are limited to the light-shield pattern and have different short-direction widths and long-direction widths, form a group which is repeatedly arranged. Accordingly, micro photoresist patterns can be formed uniformly.Type: ApplicationFiled: June 29, 2007Publication date: November 13, 2008Inventor: Cheol Hoon Yang