Abstract: An apparatus for visualizing a health status information of each individual by using a health space model includes a memory storing a health status information visualization program, and a processor configured to execute the visualization program. The visualization program inputs multidimensional data on the health status of each individual to the health space model to visually display a position of each individual in a two-dimensional health space, the health space model includes a first ordinal regression deep neural network model for outputting a first health status value based on multidimensional data of a first group and a second ordinal regression deep neural network model for outputting a second health status value based on multidimensional data of a second group, and the visualization program displays the health status information in a two-dimensional health space.

Abstract: Disclosed is a fan-out buffer which includes a first channel that includes a first delay circuit adjusting a first delay time of a calibration test signal depending on a first delay control signal, a second channel that includes a second delay circuit adjusting a second delay time of the calibration test signal depending on a second delay control signal, a first edge-to-pulse converter that detects a first edge included in a first time domain reflectometry (TDR) waveform of an output terminal of the first channel and generates a first start pulse signal including a first pulse, a second edge-to-pulse converter that generates a second start pulse signal including a second pulse, a stop pulse signal generator that generates a stop pulse signal including a first stop pulse, and a first delay control signal generator that calculates a phase difference generates the first delay control signal.

Abstract: A semiconductor memory device is provided which uses an externally applied power supply voltage as its operating voltage. The device comprises plural memory cells each arranged in intersections of word lines and bit lines. The device further comprises an internal power supply voltage generating circuit for receiving the externally applied power supply voltage to generate an internal power supply voltage of a first level. Furthermore, the device has a plurality of word line drivers each connected to the word lines and to a power node for receiving the internal power supply voltage. The each of the word line drivers drives a corresponding word line with the internal power supply voltage in response to a word line selection signal. According to the semiconductor memory device of the present invention, a potential on the word line becomes maintained constantly at the operating voltage even though the external power supply voltage is increased.