Abstract: Provided is a pharmaceutical combination preparation including fimasartan and rosuvastatin as active ingredients together with meglumine. The combination preparation exhibits an outstanding effect in treating cardiovascular disease by improving the disintegration and the dissolution which obtained better drug bioavailability and drug safety.

Abstract: Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes: a package substrate; a semiconductor chip mounted on the package substrate and electrically connected to the package substrate; a first protective layer covering the semiconductor chip and having flexibility controlled by at least one of a material type, a thickness, a material composition ratio and viscosity of the first protective layer; and a second protective layer arranged on the first protective layer and having flexibility controlled by at least one of a material type and a thickness of the second protective layer, wherein the first protective layer comprises a first binder resin, a first hardener, and a first hardening catalyst. According to the semiconductor package of the inventive concept, protective layers protecting the semiconductor chip have flexibility, and thus, the semiconductor package may be bent.

Abstract: A stack package includes a substrate, a stack of semiconductor chips mounted to the substrate, a side semiconductor chip disposed on one side of the stack, and adhesive interposed between the lower surface of the side semiconductor chip and the stack of semiconductor chips and which attaches the side semiconductor chip to the stack.

Abstract: The present invention relates to a pharmaceutical combination preparation comprising fimasartan and rosuvastatin as active ingredients together with meglumine. The combination preparation of the present invention exhibits an outstanding effect in treating cardiovascular disease by improving the disintegration and the dissolution which obtained better drug bioavailability and drug safety.

Abstract: Provided is a semiconductor package that may prevent deformation of stacked semiconductor chips and minimize a semiconductor package size. The semiconductor package includes a package base substrate, a lower chip stacked on the package base substrate, an upper chip stacked on the lower chip, and a first die attach film (DAF) attached to a bottom surface of the upper chip to cover at least a portion of the lower chip. The first DAF may be a multi-layer film including a first attaching layer contacting the bottom surface of the upper chip and a second attaching layer attached to a bottom of the first attaching layer to cover at least a portion of a side surface of the lower chip.

Abstract: Provided is a semiconductor package that may prevent deformation of stacked semiconductor chips and minimize a semiconductor package size. The semiconductor package includes a package base substrate, a lower chip stacked on the package base substrate, an upper chip stacked on the lower chip, and a first die attach film (DAF) attached to a bottom surface of the upper chip to cover at least a portion of the lower chip. The first DAF may be a multi-layer film including a first attaching layer contacting the bottom surface of the upper chip and a second attaching layer attached to a bottom of the first attaching layer to cover at least a portion of a side surface of the lower chip.

Abstract: Provided is a package-on-package (POP) having an improved joint reliability. The POP includes a lower package, an upper package that is mounted on the lower package, and a plurality of joint members that electrically connect the lower package to the upper package. The lower package includes a lower substrate and a lower semiconductor chip mounted on a first surface of the lower substrate. The upper package includes an upper substrate and at least one upper semiconductor chip mounted on the upper substrate. The joint members are arranged between the lower package and the upper package. The lower package further includes a lower sealing member that is completely filled in a space between the upper substrate of the upper package and the lower substrate of the lower package to surround the joint members and protect the lower semiconductor chips.

Abstract: Provided are a semiconductor chip package and a method of manufacturing the semiconductor package. The semiconductor chip package may include at least one semiconductor chip, whose upper surface includes a plurality of electrode pads on a substrate including a conductive pattern, and the conductive pattern and the electrode pads of the chip are connected electrically using a bonding wire. After a first insulation member is provided to an upper surface of the at least one semiconductor chip, the semiconductor chip package may be formed by providing a second insulation member in contact with the first insulation member, the bonding wires, and the at least one semiconductor chip.

Abstract: The present invention provides a lateral link for suspension systems wherein the distance between opposite ends of the lateral link increases in a tight or sudden turn, so as to enhance controllability, stability, and riding comfort of the vehicle.

Abstract: A method for growing a silicon single crystal ingot by a Czochralski method, which is capable of providing silicon wafers having very uniform in-plane quality and which results in improvement of semiconductor device yield. A method is provided for producing a silicon single crystal ingot by a Czochralski method, wherein when convection of a silicon melt is divided into a core cell and an outer cell, the silicon single crystal ingot is grown under the condition that the maximal horizontal direction width of the core cell is 30 to 60% of a surface radius of the silicon melt. In one embodiment the silicon single crystal ingot is grown under the condition that the maximal vertical direction depth of the core cell is equal to or more than 50% of the maximal depth of the silicon melt.

Abstract: A method for growing a silicon single crystal ingot by a Czochralski method, which is capable of providing silicon wafers having very uniform in-plane quality and which results in improvement of semiconductor device yield. A method is provided for producing a silicon single crystal ingot by a Czochralski method, wherein when convection distribution of a silicon melt is divided into a core cell and an outer cell, the silicon single crystal ingot is grown under the condition that the maximal horizontal direction width of the core cell is 30 to 60% of a surface radius of the silicon melt. In one embodiment the silicon single crystal ingot is grown under the condition that the maximal vertical direction depth of the core cell is equal to or more than 50% of the maximal depth of the silicon melt.

Abstract: The present invention provides a lateral link for suspension systems wherein the distance between opposite ends of the lateral link increases in a tight or sudden turn, so as to enhance controllability, stability, and riding comfort of the vehicle.

Abstract: A method for growing a silicon single crystal ingot by a Czochralski method, which is capable of providing silicon wafers having very uniform in-plane quality and which results in improvement of semiconductor device yield. A method is provided for producing a silicon single crystal ingot by a Czochralski method, wherein when convection of a silicon melt is divided into a core cell and an outer cell, the silicon single crystal ingot is grown under the condition that the maximal horizontal direction width of the core cell is 30 to 60% of a surface radius of the silicon melt. In one embodiment the silicon single crystal ingot is grown under the condition that the maximal vertical direction depth of the core cell is equal to or more than 50% of the maximal depth of the silicon melt.

Abstract: A method for growing a silicon single crystal ingot by a Czochralski method, which is capable of providing silicon wafers having very uniform in-plane quality and which results in improvement of semiconductor device yield. A method is provided for producing a silicon single crystal ingot by a Czochralski method, wherein when convection of a silicon melt is divided into a core cell and an outer cell, the silicon single crystal ingot is grown under the condition that the maximal horizontal direction width of the core cell is 30 to 60% of a surface radius of the silicon melt. In one embodiment the silicon single crystal ingot is grown under the condition that the maximal vertical direction depth of the core cell is equal to or more than 50% of the maximal depth of the silicon melt.

Abstract: Disclosed are a method and a device for correcting a track deviation by the deviation of a disc through a fine seek operation that operates a tracking actuator in a coarse seek stage of an optical disc drive wherein a track cross signal of the disc is detected in the optical pick up during the course seek operation and at the same time by using an optical encoder and a linear scale which are installed separately, a scale cross signal of the linear scale is detected and the actuator is driven by a signal resulting from comparing both the signals. At the stage of the travel of the optical pick up, the track deviation of the disk is corrected, and accordingly the relative speed between the light spot and the track at a seek direction becomes small to facilitate the control of the actuator and not to be necessary for lowering a speed of the VCM used in the coarse seek in order to lower the relative speed.