Abstract: A three-dimensional semiconductor device includes a lower connection structure; a device structure; and an upper connection structure sequentially disposed along a first direction, wherein the device structure includes a substrate on the lower connection structure; first and second source/drain patterns on the substrate; a separation pattern adjacent in a second direction to the source/drain patterns, the second direction being parallel to a bottom surface of the substrate; and a through conductive pattern adjacent in a third direction to the separation pattern, the third direction being parallel to the bottom surface of the substrate and intersecting the second direction, the through conductive pattern connects the lower connection structure and the upper connection structure to each other, and the through conductive pattern is connected either through the lower connection structure to the first source/drain pattern or through the upper connection structure to the second source/drain pattern.

Abstract: A semiconductor device includes a lower channel pattern and an upper channel pattern stacked on a substrate in a first direction perpendicular to a top surface of the substrate, lower source/drain patterns on the substrate and at a first side and a second side of the lower channel pattern, upper source/drain patterns stacked on the lower source/drain patterns and at a third side and a fourth side of the upper channel pattern, a first barrier pattern between the lower source/drain patterns and the upper source/drain patterns, and a second barrier pattern between the first barrier pattern and the upper source/drain patterns. The first barrier pattern includes a first material and the second barrier pattern includes a second material, wherein the first material and the second material are different.

Abstract: An integrated circuit semiconductor device includes a nanosheet extending above a substrate in a first horizontal direction, a gate electrode extending in a second horizontal direction while surrounding the nanosheet with a gate insulating layer therebetween, a first source/drain region on a side of the nanosheet, and a second source/drain region on another side of the nanosheet, wherein the first source/drain region includes first silicide layers provided inward from surfaces of the nanosheet, first metal layers surrounding the nanosheet from upper and lower sides of the first silicide layers, and a first nanosheet region provided between the first silicide layers, wherein the second source/drain region includes second silicide layers formed inward from the surfaces of the nanosheet, second metal layers surrounding the nanosheet from upper and lower sides of the second silicide layers, and a second nanosheet region provided between the second silicide layers.

Abstract: A semiconductor device includes a lower channel pattern and an upper channel pattern stacked on a substrate in a first direction perpendicular to a top surface of the substrate, lower source/drain patterns on the substrate and at a first side and a second side of the lower channel pattern, upper source/drain patterns stacked on the lower source/drain patterns and at a third side and a fourth side of the upper channel pattern, a first barrier pattern between the lower source/drain patterns and the upper source/drain patterns, and a second barrier pattern between the first barrier pattern and the upper source/drain patterns. the first barrier pattern includes a first material and the second barrier pattern includes a second material, wherein the first material and the second material are different.

Abstract: A semiconductor device includes a lower channel pattern and an upper channel pattern stacked on a substrate in a first direction perpendicular to a top surface of the substrate, lower source/drain patterns on the substrate and at a first side and a second side of the lower channel pattern, upper source/drain patterns stacked on the lower source/drain patterns and at a third side and a fourth side of the upper channel pattern, a first barrier pattern between the lower source/drain patterns and the upper source/drain patterns, and a second barrier pattern between the first barrier pattern and the upper source/drain patterns. the first barrier pattern includes a first material and the second barrier pattern includes a second material, wherein the first material and the second material are different.