Abstract: A process for forming a high dielectric constant, (High K), layer, for a metal-oxide-metal, capacitor structure, featuring localized oxidation of an underlying metal layer, performed at a temperature higher than the temperature experienced by surrounding structures, has been developed. A first iteration of this process features the use of a laser ablation procedure, performed to a local region of an underlying metal layer, in an oxidizing ambient. The laser ablation procedure creates the desired, high temperature, only at the laser spot, allowing a high K layer to be created at this temperature, while the surrounding structures on a semiconductor substrate, not directly exposed to the laser ablation procedure remain at lower temperatures.

Abstract: Disclosed is a method for forming a first optical device and a vertical stand-off on adjacent regions of a substrate. The method comprises the steps of: depositing subsequent layers of optical materials on the substrate and defining features of the optical device by masking and etching regions of at least one layer; defining the transverse extent of the stand-off by protectively masking a separate region of the or each layer that is etched; modifying the relative thickness of an upper section of the stand-off and the first optical device so that a second optical device subsequently supported by the stand-off is in close optical alignment with the first optical device; and etching a trench through one or more layers of material between the vertical stand-off and the first optical device.

Abstract: A method for fabricating features of different depth in a semiconductor substrate by differential etching. Each of the features is first defined by a temporary mask and a metal layer is deposited and processed to provide a negative image of the original mask, the metal layer then acting as a protective layer during etching of the semiconductor substrate to fabricate the desired feature. The technique also allows the possibility that portions of two features of different depth may connect by opening into one another.

Abstract: In the present invention, an assembly comprises one or more semiconductor optoelectronic devices sandwiched between two substrates with thermal circuitry so to provide a route by which heat can be transported from both the n-side and p-side of the semiconductor device to a cooling element. The arrangement proposed is robust, benefiting from the stability and flexibility of component integration provide by simultaneous n and p-side down configuration. The arrangement also allows a large thermal gradient to be achieved with respect to the active region of an optoelectronic device from both the n-side and p-side, resulting in fast and efficient heat spreading.

Abstract: A process for forming a high dielectric constant, (High K), layer, for a metal-oxide-metal, capacitor structure, featuring localized oxidation of an underlying metal layer, performed at a temperature higher than the temperature experienced by surrounding structures, has been developed. A first iteration of this process features the use of a laser ablation procedure, performed to a local region of an underlying metal layer, in an oxidizing ambient. The laser ablation procedure creates the desired, high temperature, only at the laser spot, allowing a high K layer to be created at this temperature, while the surrounding structures on a semiconductor substrate, not directly exposed to the laser ablation procedure remain at lower temperatures.

Abstract: A method of manufacturing a transistor with a small self aligned gate and self aligned elevated source/drain regions. A first insulating layer is formed over a substrate. A first opening is formed in the first insulating layer to expose the substrate. We form a gate dielectric layer over the substrate in the first opening. Next, first spacers are formed on the sidewalls of the first insulating layer. A gate layer is formed over the first insulating layer, the first spacers, and the gate dielectric layer. We planarize the gate layer to form a gate electrode. The first spacers are removed to form LDD openings. Next, we form lightly doped source/drain regions in the substrate in the LDD openings. Subsequently, second spacers are formed on the sidewalls of the first insulating layer and on the sidewalls of the gate electrode to form S/D openings. Source/drain regions are formed in the substrate in the S/D openings. Next, we form a conductive layer over the substrate at least partially filling the S/D openings.

Abstract: A process for forming a high dielectric constant, (High K), layer, for a metal-oxide-metal, capacitor structure, featuring localized oxidation of an underlying metal layer, performed at a temperature higher than the temperature experienced by surrounding structures, has been developed. A first iteration of this process features the use of a laser ablation procedure, performed to a local region of an underlying metal layer, in an oxidizing ambient. The laser ablation procedure creates the desired, high temperature, only at the laser spot, allowing a high K layer to be created at this temperature, while the surrounding structures on a semiconductor substrate, not directly exposed to the laser ablation procedure remain at lower temperatures.

Abstract: Small metallic patches embedded in a mainly non-metallic surface may be detected and mapped by placing a wire coil at the free end of a cantilever, with a fine tip made of a ferro-magnetic material located at its center. An alternating current is passed through the coil so that when it is near a metallic patch eddy currents are induced in the patch. These produce a small magnetic moment in the patch which pulls the tip towards the surface. This movement of the tip is detected by observing a light beam that is reflected off the surface of the cantilever. By plotting the output of a photodetector, sensistive to small changes in the reflected beam's position, as a function of the tip's location over the surface, a map of the metallic patches is produced.