Patents by Inventor Cherng-Yeuan (Henry) Tsay

Cherng-Yeuan (Henry) Tsay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Using a back-off signal to bridge a first bus to a second bus
    Patent number: 5974495
    Abstract: A PCI-bus is added to a VESA local bus (VL-bus) computer system using a VL-bus/PCI-bus bridge. The VL-bus/PCI-bus bridge claims a VL-bus cycle by asserting LDEV# to the VL-bus/system-bus bridge. If no other VL-bus device claims the cycle as well, then the VL-bus/PCI-bus bridge translates the cycle onto the PCI-bus and awaits a response from a PCI device. If no PCI device claims a cycle by the PCI-bus device claiming deadline, then the VL-bus/PCI-bus bridge asserts BOFF# to the host and suppresses its assertion of LDEV# when the host repeats the cycle on the VL-bus. The VL-bus/system-bus bridge therefore can translate the repetition of the cycle onto the system bus. When asserting BOFF# to the host, the VL-bus/PCI-bus bridge also asserts the VL-bus device ready signal LRDY# after assertion of BOFF# and releases LRDY# before releasing BOFF#.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: October 26, 1999
    Assignee: OPTi Inc.
    Inventors: Fong Lu (David) Lin, Cherng-Yeuan (Henry) Tsay, David H. Doan
  • VL-bus/PCI-bus bridge
    Patent number: 5790831
    Abstract: A PCI-bus is added to a VESA local bus (VL-bus) computer system using a VL-bus/PCI-bus bridge. The VL-bus/PCI-bus bridge claims a VL-bus cycle by asserting LDEV# to the VL-bus/system-bus bridge. If no other VL-bus device claims the cycle as well, then the VL-bus/PCI-bus bridge translates the cycle onto the PCI-bus and awaits a response from a PCI device. If no PCI device claims a cycle by the PCI-bus device claiming deadline, then the VL-bus/PCI-bus bridge asserts BOFF# to the host and suppresses its assertion of LDEV# when the host repeats the cycle on the VL-bus. The VL-bus/system-bus bridge therefore can translate the repetition of the cycle onto the system bus. When asserting BOFF# to the host, the VL-bus/PCI-bus bridge also asserts the VL-bus device ready signal LRDY# after assertion of BOFF# and releases LRDY# before releasing BOFF#.
    Type: Grant
    Filed: September 18, 1996
    Date of Patent: August 4, 1998
    Assignee: Opti Inc.
    Inventors: Fong Lu (David) Lin, Cherng-Yeuan (Henry) Tsay, David H. Doan