Patents by Inventor Cheryl Palomaki

Cheryl Palomaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120012553
    Abstract: A method for making a leadless chip carrier (LCC) for use in electronic packages having a core layer stripped of copper cladding, containing drilled clearance holes within, a layer of resin coated copper (RCC) placed on the upper surface of the core layer and a second layer of RCC placed on the lower surface of the core layer. The layers are laminated together with the RCC filling the clearance holes during lamination. A pattern is etched on the RCC and vias are drilled through the filled clearance holes and pre-plated with seed copper layers. The seed copper layers in the vias are then covered by a layer of copper plating to meet the requirements of the core buildup layer, and resin inhibiting conductive anodic filament (CAF) growth within the structure.
    Type: Application
    Filed: July 16, 2010
    Publication date: January 19, 2012
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert M. Japp, Kostas I. Papathomas, Cheryl Palomaki
  • Patent number: 7508076
    Abstract: An information handling system which includes as part thereof a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: March 24, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David L. Thomas
  • Patent number: 7416996
    Abstract: A method of making a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: August 26, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David L. Thomas
  • Publication number: 20070090170
    Abstract: A method of making a circuitized substrate in which solder material (e.g., in paste form) is deposited through a screen onto individual conductors in a spaced pattern of individual solder “islands”. A solder flux is then deposited onto the “islands” causing these to spread out and form a continuous solder layer across the conductor's upper surface. The solder layer is then capable of coupling to an external conductor such as a solder ball, to form an electrical assembly such as might be used within an information handling system such as a personal computer.
    Type: Application
    Filed: October 20, 2005
    Publication date: April 26, 2007
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Steven Anderson, Scott Moore, Cheryl Palomaki, Son Tran
  • Patent number: 7078816
    Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate is also provided, as is a circuitized structure including the circuitized substrate in combination with other circuitized substrates having lesser dense thru-hole patterns. An information handling system incorporating the circuitized substrate of the invention as part thereof is also provided.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: July 18, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David L. Thomas
  • Publication number: 20060131755
    Abstract: A method of making a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Application
    Filed: February 9, 2006
    Publication date: June 22, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David Thomas
  • Publication number: 20060125103
    Abstract: An information handling system which includes as part thereof a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Application
    Filed: February 10, 2006
    Publication date: June 15, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David Thomas
  • Publication number: 20050224985
    Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate is also provided, as is a circuitized structure including the circuitized substrate in combination with other circuitized substrates having lesser dense thru-hole patterns. An information handling system incorporating the circuitized substrate of the invention as part thereof is also provided.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 13, 2005
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David Thomas