Patents by Inventor Chetan Paydenkar

Chetan Paydenkar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8344487
    Abstract: A packaged microchip has a lead frame with a die directly contacting at least a single, contiguous portion of the lead frame. The portion of the lead frame has a top surface forming a concavity and contacting the die. The packaged microchip also has mold material substantially encapsulating part of the top surface of the portion of the lead frame.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: January 1, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Xin Zhang, Michael Judy, Kevin H. L. Chau, Nelson Kuan, Timothy Spooner, Chetan Paydenkar, Peter Farrell
  • Publication number: 20100013067
    Abstract: A package apparatus has a base coupled with a lid to form a leadframe package. The package has first and second exterior surfaces with respective first and second contact patterns. The first and second contact patterns are substantially electrically identical to permit the package to be either vertically or horizontally mounted to an underlying apparatus.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 21, 2010
    Applicant: ANALOG DEVICES, INC.
    Inventors: Xin Zhang, Michael Judy, Kevin H.L. Chau, Nelson Kuan, Timothy Spooner, Chetan Paydenkar, Peter Farrell
  • Publication number: 20090230521
    Abstract: A packaged microchip has a lead frame with a die directly contacting at least a single, contiguous portion of the lead frame. The portion of the lead frame has a top surface forming a concavity and contacting the die. The packaged microchip also has mold material substantially encapsulating part of the top surface of the portion of the lead frame.
    Type: Application
    Filed: June 28, 2007
    Publication date: September 17, 2009
    Applicant: Analog Devices, Inc.
    Inventors: Xin Zhang, Michael Judy, Kevin Chau, Nelson Kuan, Timothy Spooner, Chetan Paydenkar, Peter Farrell
  • Publication number: 20080157298
    Abstract: A package apparatus has a base coupled with a lid to form a leadframe package. The package has first and second exterior surfaces with respective first and second contact patterns. The first and second contact patterns are substantially electrically identical to permit the package to be either vertically or horizontally mounted to an underlying apparatus.
    Type: Application
    Filed: June 28, 2007
    Publication date: July 3, 2008
    Applicant: ANALOG DEVICES, INC.
    Inventors: Xin Zhang, Michael Judy, Kevin H.L. Chau, Nelson Kuan, Timothy Spooner, Chetan Paydenkar, Peter Farrell
  • Patent number: 7354802
    Abstract: In one aspect, an improved wafer mount tape is provided. The wafer mount tape includes a base layer, a release layer that expands when activated and a B-stageable adhesive layer that is positioned over the release layer. In a method aspect of the invention, a wafer level method of placing an adhesive layer on the back surface of integrated circuit devices is described. In this aspect, a wafer is secured to the mount tape. The wafer is diced while the wafer is attached to the mounting tape. After the wafer has been diced and any other desired wafer level processing is completed, the dice may be released individually or in groups by heating (or otherwise activating) localized areas of the tape under selected die to a temperature sufficient to release the selected die. The expansion of the release layer during the release operation serves to lift the selected die relative to adjacent die thereby facilitating picking.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: April 8, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Anindya Poddar, Chetan Paydenkar
  • Patent number: 7101620
    Abstract: In one aspect, an improved wafer mount tape is provided. The wafer mount tape includes a base layer, a release layer that expands when activated and a B-stageable adhesive layer that is positioned over the release layer. In a method aspect of the invention, a wafer level method of placing an adhesive layer on the back surface of integrated circuit devices is described. In this aspect, a wafer is secured to the mount tape. The wafer is diced while the wafer is attached to the mounting tape. After the wafer has been diced and any other desired wafer level processing is completed, the dice may be released individually or in groups by heating (or otherwise activating) localized areas of the tape under selected die to a temperature sufficient to release the selected die. The expansion of the release layer during the release operation serves to lift the selected die relative to adjacent die thereby facilitating picking.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: September 5, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Anindya Poddar, Chetan Paydenkar