Patents by Inventor Chetan Vasudeo NAYAK

Chetan Vasudeo NAYAK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Pre-screening and tuning heterojunctions for topological quantum computer
    Patent number: 11808796
    Abstract: A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes (a) measuring one or both of a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction and a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction, to obtain mapping data and refinement data; (b) finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; and (c) finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: November 7, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Dmitry Pikulin, Mason L Thomas, Chetan Vasudeo Nayak, Roman Mykolayovych Lutchyn, Bas Nijholt, Bernard Van Heck, Esteban Adrian Martinez, Georg Wolfgang Winkler, Gijsbertus De Lange, John David Watson, Sebastian Heedt, Torsten Karzig
  • PRE-SCREENING AND TUNING HETEROJUNCTIONS FOR TOPOLOGICAL QUANTUM COMPUTER
    Publication number: 20220299551
    Abstract: A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes (a) measuring one or both of a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction and a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction, to obtain mapping data and refinement data; (b) finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; and (c) finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.
    Type: Application
    Filed: February 15, 2022
    Publication date: September 22, 2022
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Dmitry PIKULIN, Mason L THOMAS, Chetan Vasudeo NAYAK, Roman Mykolayovych LUTCHYN, Bas NIJHOLT, Bernard VAN HECK, Esteban Adrian MARTINEZ, Georg Wolfgang WINKLER, Gijsbertus DE LANGE, John David WATSON, Sebastian HEEDT, Torsten KARZIG
  • Pre-screening and tuning heterojunctions for topological quantum computer
    Patent number: 11151470
    Abstract: A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes measuring a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction to obtain mapping data; finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; measuring a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in each of the one or more regions of the parameter space, to obtain refinement data; and finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: October 19, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Dmitry Pikulin, Mason L Thomas, Chetan Vasudeo Nayak, Roman Mykolayovych Lutchyn, Georg Wolfgang Winkler, Sebastian Heedt, Gijsbertus De Lange, Bernard Van Heck, Esteban Adrian Martinez, Lucas Casparis, Torsten Karzig
  • PRE-SCREENING AND TUNING HETEROJUNCTIONS FOR TOPOLOGICAL QUANTUM COMPUTER
    Publication number: 20210279626
    Abstract: A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes measuring a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction to obtain mapping data; finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; measuring a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in each of the one or more regions of the parameter space, to obtain refinement data; and finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.
    Type: Application
    Filed: May 28, 2020
    Publication date: September 9, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Dmitry PIKULIN, Mason L THOMAS, Chetan Vasudeo NAYAK, Roman Mykolayovych LUTCHYN, Georg Wolfgang WINKLER, Sebastian HEEDT, Gijsbertus DE LANGE, Bernard VAN HECK, Esteban Adrian MARTINEZ, Lucas CASPARIS, Torsten KARZIG