Abstract: A high-capacity system memory may be built from both quasi-volatile (QV) memory circuits, logic circuits, and static random-access memory (SRAM) circuits. Using the SRAM circuits as buffers or cache for the QV memory circuits, the system memory may achieve access latency performance of the SRAM circuits and may be used as code memory. The system memory is also capable of direct memory access (DMA) operations and includes an arithmetic logic unit for performing computational memory tasks. The system memory may include one or more embedded processors. In addition, the system memory may be configured for multi-channel memory accesses by multiple host processors over multiple host ports. The system memory may be provided in the dual-in-line memory module (DIMM) format.

Abstract: A first circuit formed on a first semiconductor substrate is wafer-bonded to a second circuit formed on a second memory circuit, wherein the first circuit includes quasi-volatile or non-volatile memory circuits and wherein the second memory circuit includes fast memory circuits that have lower read latencies than the quasi-volatile or non-volatile memory circuits, as well as logic circuits. The volatile and non-volatile memory circuits may include static random-access memory (SRAM) circuits, dynamic random-access memory (DRAM) circuits, embedded DRAM (eDRAM) circuits, magnetic random-access memory (MRAM) circuits, embedded MRAM (eMRAM), or any suitable combination of these circuits.

Abstract: A high-capacity system memory may be built from both quasi-volatile (QV) memory circuits, logic circuits, and static random-access memory (SRAM) circuits. Using the SRAM circuits as buffers or cache for the QV memory circuits, the system memory may achieve access latency performance of the SRAM circuits and may be used as code memory. The system memory is also capable of direct memory access (DMA) operations and includes an arithmetic logic unit for performing computational memory tasks. The system memory may include one or more embedded processor. In addition, the system memory may be configured for multi-channel memory accesses by multiple host processors over multiple host ports. The system memory may be provided in the dual-in-line memory module (DIMM) format.

Abstract: A first circuit formed on a first semiconductor substrate is wafer-bonded to a second circuit formed on a second memory circuit, wherein the first circuit includes quasi-volatile or non-volatile memory circuits and wherein the second memory circuit includes fast memory circuits that have lower read latencies than the quasi-volatile or non-volatile memory circuits, as well as logic circuits. The volatile and non-volatile memory circuits may include static random-access memory (SRAM) circuits, dynamic random-access memory (DRAM) circuits, embedded DRAM (eDRAM) circuits, magnetic random-access memory (MRAM) circuits, embedded MRAM (eMRAM), or any suitable combination of these circuits.

Abstract: The present invention relates to a super absorbent polymer and a method for producing same. The super absorbent polymer can achieve a high deodorizing function while exhibiting excellent absorption properties. As such, by using the super absorbent polymer, adult diapers having a thin thickness and high deodorizing function can be provided.

Abstract: The present disclosure relates to a preparation method for a super absorbent polymer sheet and a super absorbent polymer sheet prepared therefrom. According to the preparation method of the present disclosure, a porous super absorbent polymer sheet can be prepared by a simplified process.

Abstract: The present invention relates to a super absorbent polymer. The super absorbent polymer contains polymer particles formed of large pores in a certain amount or more, and thus can exhibit large surface area and excellent initial absorption capacity. Therefore, when the super absorbent polymer is used, it can provide a sanitary material such as a diaper or a sanitary napkin which can quickly absorb body fluids and impart a dry and soft touch feeling.

Abstract: A first circuit formed on a first semiconductor substrate is wafer-bonded to a second circuit formed on a second memory circuit, wherein the first circuit includes quasi-volatile or non-volatile memory circuits and wherein the second memory circuit includes fast memory circuits that have lower read latencies than the quasi-volatile or non-volatile memory circuits, as well as logic circuits. The volatile and non-volatile memory circuits may include static random-access memory (SRAM) circuits, dynamic random-access memory (DRAM) circuits, embedded DRAM (eDRAM) circuits, magnetic random-access memory (MRAM) circuits, embedded MRAM (eMRAM), or any suitable combination of these circuits.

Abstract: A semiconductor device includes a first substrate, a second substrate, a first connection structure, and a second connection structure. A transistor is formed in a first side of the first substrate. A doped region is formed in a first side of the second substrate. The first connection structure is formed over a second side of the second substrate, and coupled to the doped region through a first VIA that extends from the second side of the second substrate to the doped region. The second connection structure is formed over the first side of the first substrate, connected with the first connection structure via a through silicon VIA, and coupled to the transistor through a bonding VIA. The first substrate is bonded to the second substrate by the bonding VIA, with the first side of the first substrate and the first side of the second substrate being facing each other.

Abstract: A first circuit formed on a first semiconductor substrate is wafer-bonded to a second circuit formed on a second memory circuit, wherein the first circuit includes quasi-volatile or non-volatile memory circuits and wherein the second memory circuit includes fast memory circuits that have lower read latencies than the quasi-volatile or non-volatile memory circuits, as well as logic circuits. The volatile and non-volatile memory circuits may include static random-access memory (SRAM) circuits, dynamic random-access memory (DRAM) circuits, embedded DRAM (eDRAM) circuits, magnetic random-access memory (MRAM) circuits, embedded MRAM (eMRAM), or any suitable combination of these circuits.

Abstract: The present invention relates to a super-absorbent polymer having excellent properties, both centrifugal retention capacity (CRC) and absorption under pressure (AUP) having been improved by introducing a surface crosslinked layer crosslinked by surface-modified inorganic particles, and to a method for preparing the same. The super-absorbent polymer comprises: a base resin powder containing a crosslinked polymer of water-soluble ethylene-based unsaturated monomers having an at least partially neutralized acidic group; and a surface crosslinked layer formed on the base resin powder, wherein inorganic particles may be chemically bound to the crosslinked polymer contained in the surface crosslinked layer, via an oxygen-containing bond or a nitrogen-containing bond.

Abstract: A high-capacity system memory may be built from both quasi-volatile (QV) memory circuits, logic circuits, and static random-access memory (SRAM) circuits. Using the SRAM circuits as buffers or cache for the QV memory circuits, the system memory may achieve access latency performance of the SRAM circuits and may be used as code memory. The system memory is also capable of direct memory access (DMA) operations and includes an arithmetic logic unit for performing computational memory tasks. The system memory may include one or more embedded processor. In addition, the system memory may be configured for multi-channel memory accesses by multiple host processors over multiple host ports. The system memory may be provided in the dual-in-line memory module (DIMM) format.

Abstract: A semiconductor device includes a first substrate having a first side for forming memory cells and an opposing second side, a doped region formed in the first side of the first substrate, a first connection structure formed over the second side of the first substrate and coupled to the doped region through a first VIA, and a transistor formed in a first side of a second substrate and coupled to the first connection structure. The first VIA extends from the second side of the first substrate to the doped region. The memory cells include a plurality of word lines formed over the first side of the first substrate, a plurality of insulating layers disposed between the plurality of word lines, and a common source structure coupled to and extending from the doped region, and further extending through the plurality of word lines and the plurality of the insulating layers.

Abstract: A high-capacity system memory may be built from both quasi-volatile (QV) memory circuits, logic circuits, and static random-access memory (SRAM) circuits. Using the SRAM circuits as buffers or cache for the QV memory circuits, the system memory may achieve access latency performance of the SRAM circuits and may be used as code memory. The system memory is also capable of direct memory access (DMA) operations and includes an arithmetic logic unit for performing computational memory tasks. The system memory may include one or more embedded processor. In addition, the system memory may be configured for multi-channel memory accesses by multiple host processors over multiple host ports. The system memory may be provided in the dual-in-line memory module (DIMM) format.

Abstract: A method of setting a user-defined virtual network is disclosed. A method of setting a virtual network includes configuring a virtual network including a controller, at least one network address translation (NAT) and at least one edge node, checking an operation type of the at least one edge node, setting a tunnel between the at least one edge node based on the operation type, and performing data transmission between the at least one edge node through the set tunnel.

Abstract: The present invention relates to an ophthalmic preparation containing an active ingredient selected from 3-phenyl-4-propyl-1-(pyridin-2-yl)-1H-pyrazol-5-ol compound or a pharmaceutically acceptable salt thereof. The eye drop according to the present invention is excellent in stability and safety and shows an excellent effect on prevention or treatment of eye diseases in such a way that an active ingredient thereof reaches a posterior segment of an eyeball simply through instillation rather than a direct injection into an eyeball.

Abstract: A 3D-NAND memory includes a transistor formed in a first side of a periphery circuit substrate, a memory cell stack formed over a first side of a cell array substrate, and a first connection structure formed over an opposing second side of the cell array substrate. The memory cell stack includes a doped region formed in the first side of the cell array substrate and coupled to the first connection structure through a first VIA, a common source structure that extends from the doped region toward the first side of the periphery circuit substrate, and a second connection structure that is positioned over and coupled to the common source structure. The first side of the cell array substrate and the first side of the periphery circuit substrate are aligned facing each other so that the transistor is coupled to the second connection structure.

Abstract: The present invention relates to a super absorbent polymer. The super absorbent polymer exhibits excellent initial absorption capacity, and thus can provide a sanitary material such as a diaper or a sanitary napkin which can quickly absorb body fluids and impart a dry and soft touch feeling.

Abstract: The present disclosure relates to a preparation method for a super absorbent polymer sheet and a super absorbent polymer sheet prepared therefrom. According to the preparation method of the present disclosure, a porous super absorbent polymer sheet can be prepared by a simplified process.

Abstract: The present invention relates to a method for preparing superabsorbent polymer that introduces a plate type and rod-shaped clay additive in the superabsorbent polymer, and thus exhibits basic properties of a superabsorbent polymer equivalent to or much better than the existing superabsorbent polymer through multi-crosslinking, and particularly, can improve absorbency under pressure (AUP), and a superabsorbent polymer obtained thereby.