Patents by Inventor Chew Yuan Woong

Chew Yuan Woong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7446603
    Abstract: A differential input Class D audio power amplifier incorporating a differential error amplifier is introduced. In response of differential input signal, this differential error amplifier generates two error signals, which subsequently generates final output signal. This architecture makes it the effect of feedback signal error correction doubled, which helps in achieving good THD. In addition, input port of this architecture is also compatible with single-ended signal. A pop noise suppression technique for this differential input Class D audio power amplifier is also introduced.
    Type: Grant
    Filed: August 17, 2006
    Date of Patent: November 4, 2008
    Assignees: Matsushita Electric Industrial Co., Ltd., Panasonic Semiconductor Asia Pte. Ltd.
    Inventors: Shiah Siew Wong, Wee Sien Hong, Tien Yew Kang, Chew Yuan Woong
  • Publication number: 20080042743
    Abstract: A differential input Class D audio power amplifier incorporating a differential error amplifier is introduced. In response of differential input signal, this differential error amplifier generates two error signals, which subsequently generates final output signal. This architecture makes it the effect of feedback signal error correction doubled, which helps in achieving good THD. In addition, input port of this architecture is also compatible with single-ended signal. A pop noise suppression technique for this differential input Class D audio power amplifier is also introduced.
    Type: Application
    Filed: August 17, 2006
    Publication date: February 21, 2008
    Applicants: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., Panasonic Semiconductor Asia Pte. Ltd.
    Inventors: Shiah Siew WONG, Wee Sien HONG, Tien Yew KANG, Chew Yuan WOONG
  • Patent number: 7332969
    Abstract: A output offset protection circuit provides protection of the load and the power amplifier through monitoring the temperature of the power transistor in the operational amplifier to detect fault conditions of an output block. In the output offset protection circuit, a sensor block monitors the temperature differences between the power transistors, while the output block is driving the load. Upon detection of the temperature differences reaching a 1st threshold level, the cutoff block sends a cutoff signal to a protection switch block, and the hysteresis block is activated. The hysteresis block shifts the threshold level lower to the 2nd threshold level. The sensor block continues to monitor the temperature differences until the 2nd threshold level is reached. Then the cutoff block is deactivated.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: February 19, 2008
    Assignees: Matsushita Electric Industrial Co., Ltd., Panasonic Semiconductor Asia Pte., Ltd.
    Inventors: Chew Yuan Woong, Yasuo Higuchi