Patents by Inventor Chi-Chao Lee
Chi-Chao Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240194999Abstract: A robot includes a limit device and an energy storehouse, the limiting device may lock or loosen a battery opened in the energy storehouse, the limiting device includes a first connecting member, a transmission rod, and a second connecting member. The first connecting member includes a first main body portion and two first connecting elements arranged at intervals. The two first connecting elements are respectively connected to the first main body. The transmission rod includes a first end and a second end arranged at intervals. The first end penetrates through one of the two first connecting elements. The second end penetrates through the other one of the two first connecting element. The second connecting member includes two indexing buckles arranged at intervals, each of the indexing buckles includes a first limiting groove and a second limiting groove.Type: ApplicationFiled: February 21, 2024Publication date: June 13, 2024Inventors: CHEN-TING KAO, CHI-CHENG WEN, YU-SHENG CHANG, CHIH-CHENG LEE, CHIUNG-HSIANG WU, SHENG-LI YEN, YU-CHENG ZHANG, CHANG-JU HSIEH, CHEN CHAO
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Publication number: 20240133949Abstract: An outlier IC detection method includes acquiring first measured data of a first IC set, training the first measured data for establishing a training model, acquiring second measured data of a second IC set, generating predicted data of the second IC set by using the training model according to the second measured data, generating a bivariate dataset distribution of the second IC set according to the predicted data and the second measured data, acquiring a predetermined Mahalanobis distance on the bivariate dataset distribution of the second IC set, and identifying at least one outlier IC from the second IC set when at least one position of the at least one outlier IC on the bivariate dataset distribution is outside a range of the predetermined Mahalanobis distance.Type: ApplicationFiled: October 3, 2023Publication date: April 25, 2024Applicant: MEDIATEK INC.Inventors: Yu-Lin Yang, Chin-Wei Lin, Po-Chao Tsao, Tung-Hsing Lee, Chia-Jung Ni, Chi-Ming Lee, Yi-Ju Ting
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Patent number: 11942652Abstract: The disclosure provides a limit device and a robot using the same. The limit device comprises a first connecting member, a transmission rod and a second connecting member. The first connecting member comprising a first main body portion and two first connecting elements. The two first connecting elements are arranged at intervals. The two first connecting elements are respectively connected to the first main body. The transmission rod comprising a first end and a second end. The first end and the second end are arranged at intervals. The first end penetrates through one of the two first connecting elements. The second end penetrates through the other one of the two first connecting element. The second connecting member provided with two indexing buckles. The two indexing buckles are arranged at intervals, each of the indexing buckles comprises a first limiting groove and a second limiting groove.Type: GrantFiled: April 13, 2022Date of Patent: March 26, 2024Assignees: Futaijing Precision Electronics (Yantai) Co., Ltd., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Chen-Ting Kao, Chi-Cheng Wen, Yu-Sheng Chang, Chih-Cheng Lee, Chiung-Hsiang Wu, Sheng-Li Yen, Yu-Cheng Zhang, Chang-Ju Hsieh, Chen Chao
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Publication number: 20230200775Abstract: An ultrasonic imaging system includes an ultrasonic probe and a processing unit. The ultrasonic probe is operable at multiple different tilt angles to perform ultrasonic measurement and to obtain a plurality 2D ultrasonic images corresponding respectively to the different tilt angles. The processing unit calculates a 3D ultrasonic images based on the 2D ultrasonic images and the corresponding tilt angles.Type: ApplicationFiled: March 4, 2023Publication date: June 29, 2023Inventors: Hao-Li LIU, Po-Hsiang TSUI, Chi-Chao LEE
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Patent number: 11159168Abstract: Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.Type: GrantFiled: November 10, 2020Date of Patent: October 26, 2021Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Anna Y. Herr, Quentin P. Herr, Ryan Edward Clarke, Harold Clifton Hearne, III, Alexander Louis Braun, Randall M. Burnett, Timothy Chi-Chao Lee
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Publication number: 20210083676Abstract: Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.Type: ApplicationFiled: November 10, 2020Publication date: March 18, 2021Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: ANNA Y. HERR, QUENTIN P. HERR, RYAN EDWARD CLARKE, HAROLD CLIFTON HEARNE, III, ALEXANDER LOUIS BRAUN, RANDALL M. BURNETT, TIMOTHY CHI-CHAO LEE
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Publication number: 20210068781Abstract: An ultrasonic imaging system includes an ultrasonic probe and a processing unit. The ultrasonic probe is operable at multiple different tilt angles to perform ultrasonic measurement and to obtain a plurality 2D ultrasonic images corresponding respectively to the different tilt angles. The processing unit calculates a 3D ultrasonic images based on the 2D ultrasonic images and the corresponding tilt angles.Type: ApplicationFiled: May 1, 2020Publication date: March 11, 2021Inventors: Hao-Li Liu, Po-Hsiang Tsui, Chi-Chao Lee
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Patent number: 10868540Abstract: Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.Type: GrantFiled: December 2, 2019Date of Patent: December 15, 2020Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Anna Y. Herr, Quentin P. Herr, Ryan Edward Clarke, Harold Clifton Hearne, III, Alexander Louis Braun, Randall M. Burnett, Timothy Chi-Chao Lee
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Publication number: 20200106444Abstract: Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.Type: ApplicationFiled: December 2, 2019Publication date: April 2, 2020Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: ANNA Y. HERR, QUENTIN P. HERR, RYAN EDWARD CLARKE, HAROLD CLIFTON HEARNE, III, ALEXANDER LOUIS BRAUN, RANDALL M. BURNETT, TIMOTHY CHI-CHAO LEE
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Publication number: 20200044656Abstract: Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.Type: ApplicationFiled: July 31, 2018Publication date: February 6, 2020Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: ANNA Y. HERR, QUENTIN P. HERR, RYAN EDWARD CLARKE, HAROLD CLIFTON HEARNE, III, ALEXANDER LOUIS BRAUN, RANDALL M. BURNETT, TIMOTHY CHI-CHAO LEE
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Patent number: 10554207Abstract: Non-destructive read out (NDRO) circuits are provided for use in reciprocal quantum logic (RQL) superconducting systems. Each NDRO circuit includes a “body” circuit that provides a single or multi-state sub-critical bias current to one or many independent “tail” circuitries. Each “tail” has minimal effect on the “body” thereby preventing any interference or destruction to the state of the “body” circuitry. The circuits reduce device count and thereby increase circuit density, simplify and reduce the cost of fabrication, and provide functionality not available in existing designs, such as the ability to write a state and read it in the same operation cycle. The NDRO circuits provide more compact unit cells useful in memory or logic arrays, demanding fewer resources with increased functionality. The circuits also provide compact cells for AND, AND-OR, A-NOT-B, inverter, multiplexer, and demultiplexer gates.Type: GrantFiled: July 31, 2018Date of Patent: February 4, 2020Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Anna Y. Herr, Quentin P. Herr, Ryan Edward Clarke, Harold Clifton Hearne, III, Alexander Louis Braun, Randall M. Burnett, Timothy Chi-Chao Lee