Abstract: A method of fabricating a device includes forming a dummy gate over a plurality of fins. Thereafter, a first portion of the dummy gate is removed to form a first trench that exposes a first hybrid fin and a first part of a second hybrid fin. The method further includes filling the first trench with a dielectric material disposed over the first hybrid fin and over the first part of the second hybrid fin. Thereafter, a second portion of the dummy gate is removed to form a second trench and the second trench is filled with a metal layer. The method further includes etching-back the metal layer, where a first plane defined by a first top surface of the metal layer is disposed beneath a second plane defined by a second top surface of a second part of the second hybrid fin after the etching-back the metal layer.

Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.

Abstract: A method for manufacturing a semiconductor chip with bumps comprises providing a semiconductor chip, which defines an active surface and a back surface and has a plurality of pads disposed on the active surface, and a plurality of preformed solder balls. A passivation is disposed on the active surface of the semiconductor chip with the pads exposed. A plurality of UBMs (Under Bump Metallurgy) are disposed on the pads and define a plurality of bump pads. The diameter of the bump pads is about 100% to about 130% of the diameter of the preformed solder balls. The preformed solder balls are placed on the bump pads and then reflowed to form a plurality of bumps on the semiconductor chip.

Abstract: A method for manufacturing a semiconductor chip with bumps comprises providing a semiconductor chip, which defines an active surface and a back surface and has a plurality of pads disposed on the active surface, and a plurality of preformed solder balls. A passivation is disposed on the active surface of the semiconductor chip with the pads exposed. A plurality of UBMs (Under Bump Metallurgy) are disposed on the pads and define a plurality of bump pads. The diameter of the bump pads is about 100% to about 130% of the diameter of the preformed solder balls. The preformed solder balls are placed on the bump pads and then reflowed to form a plurality of bumps on the semiconductor chip.

Abstract: A semiconductor wafer includes a plurality of areas and an array of dice disposed within each of the areas. The feature of the present invention is that at least two fiducial marks are disposed in each of the areas. The present invention further provides a method of testing a sawed semiconductor wafer.

Abstract: A semiconductor wafer device is provided in this invention. The semiconductor wafer device includes a plurality of chips, circuits, cutting streets, and a polymer layer. The cutting streets include a plurality of longitudinal cutting streets and transverse cutting streets, which are formed between the neighboring chips, and the polymer layer is formed on the cutting streets. In addition, this invention also provides a semiconductor wafer device with a plurality of bumps formed thereon and the bumps are encompassed with a polymer layer.

Abstract: A semiconductor wafer includes a plurality of areas and an array of dice disposed within each of the areas. The feature of the present invention is that at least two fiducial marks are disposed in each of the areas. The present invention further provides a method of testing a sawed semiconductor wafer.