Patents by Inventor Chi-Chih Chu

Chi-Chih Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7417329
    Abstract: A system-in-package structure includes a carrier substrate having a molding area and a periphery area, at least a chip disposed in the molding area, an encapsulation covering the chip and the molding area, a plurality of solder pads disposed in the periphery area, and a solder mask disposed in the periphery area and partially exposing the surface of the solder pads. The solder mask includes at least a void therein.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: August 26, 2008
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Meng-Jung Chuang, Cheng-Yin Lee, Wei-Chang Tai, Chi-Chih Chu
  • Publication number: 20080076208
    Abstract: The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electrically connecting the chip and the substrate; forming a plurality of first conductive bodies on the surface of the substrate; forming a molding compound for encapsulating the surface of the substrate, the chip, the connecting elements and the first conductive bodies; and removing a part of a border portion of the molding compound, so that the molding compound has two heights and one end of each first conductive bodies is exposed. Thereby, the molding compound covers the entire surface of the substrate, so that the bonding pads on the surface of the substrate will not be polluted.
    Type: Application
    Filed: July 26, 2007
    Publication date: March 27, 2008
    Inventors: Yen-Yi Wu, Wei-Yueh Sung, Pao-Huei Chang Chien, Chi-Chih Chu, Cheng-Yin Lee, Gwo-Liang Weng
  • Publication number: 20080073769
    Abstract: The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electrically connecting the chip and the substrate; forming a plurality of first conductive bodies on the surface of the substrate; forming a molding compound for encapsulating the surface of the substrate, the chip, the connecting elements and the first conductive bodies; and removing a part of a border portion of the molding compound, so that the molding compound has two heights and one end of each first conductive bodies is exposed. Thereby, the molding compound covers the entire surface of the substrate, so that the bonding pads on the surface of the substrate will not be polluted.
    Type: Application
    Filed: July 26, 2007
    Publication date: March 27, 2008
    Inventors: Yen-Yi Wu, Wei-Yueh Sung, Pao-Huei Chang Chien, Chi-Chih Chu, Cheng-Yin Lee, Gwo-Liang Weng
  • Publication number: 20080001272
    Abstract: A system-in-package structure for preventing a solder ball pad from being polluted and a method of fabricating the same are disclosed. The package structure includes a first package and a second package welded with each other. The first package has a carrier with plural solder ball pads and at least one integrated circuits (ICs) electrically connected to the carrier. A groove is formed around each solder ball pad and used to contain the overflowed sealing compound when the ICs are packaged on the first package by a sealing compound, so that the solder ball pad can avoid being polluted by the sealing compound. Thereby, the first package and second package are exactly electrical connected to each other and form a stacking structure.
    Type: Application
    Filed: November 21, 2006
    Publication date: January 3, 2008
    Inventor: Chi-Chih Chu
  • Publication number: 20070243704
    Abstract: The present invention relates to a substrate structure having a solder mask and a process for making the same. The process comprises: (a) providing a substrate having a top surface, the top surface having a die pad and a plurality of solder pads; (b) forming a first solder mask on the top surface, the first solder mask having a plurality of openings, each opening corresponding to each solder pad so as to expose at least part of the solder pad; and (c) forming a second solder mask on the first solder mask. Whereby, the substrate structure of the invention can be used for packaging a thicker die so as to prevent the die crack and the overflow of molding compound will be avoided.
    Type: Application
    Filed: December 6, 2006
    Publication date: October 18, 2007
    Inventors: Wei-Chang Tai, Chi-Chih Chu, Meng-Jung Chuang, Cheng-Yin Lee, Yao-Ting Huang, Kuang-Lin Lo
  • Publication number: 20070132093
    Abstract: A system-in-package structure includes a carrier substrate having a molding area and a periphery area, at least a chip disposed in the molding area, an encapsulation covering the chip and the molding area, a plurality of solder pads disposed in the periphery area, and a solder mask disposed in the periphery area and partially exposing the surface of the solder pads. The solder mask includes at least a void therein.
    Type: Application
    Filed: May 25, 2006
    Publication date: June 14, 2007
    Inventors: Meng-Jung Chuang, Cheng-Yin Lee, Wei-Chang Tai, Chi-Chih Chu
  • Patent number: 7187070
    Abstract: A Stackable package module comprises a plurality of semiconductor devices in stack. One of the semiconductor devices includes a chip with an active surface and a corresponding back surface, a plurality of solder bumps and a plurality of stud bumps. The solder bumps are formed on the active surface. The stud bumps are formed on the back surface. Each stud bump has a bump body and a protruding trail by wire-bonding and cutting. Bumps of another package are bonded on the stub bumps for replacing known intermediate substrate in conventional stacked package module.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: March 6, 2007
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi Chih Chu, Cheng-Yin Lee, Gwo-Liang Weng, Shih-Chang Lee
  • Patent number: 7126221
    Abstract: A semiconductor package comprising a substrate and a semiconductor device disposed on the substrate by flip-chip bonding. The present invention is characterized by a connection structure disposed between the semiconductor device and the substrate that extends along the periphery of the bottom surface of the semiconductor device. As a result, it can preferably provide additional mounting support between the two. The connection structure can be formed from cured adhesive. The present invention also provides a method of manufacturing the semiconductor package.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: October 24, 2006
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Gwo-Liang Weng, Yung-Li Lu, Chi-Chih Chu, Shih-Chang Lee
  • Patent number: 6976781
    Abstract: A frame including a first edge and a second edge, wherein on outer surfaces of the first edge, first hooks are formed to protrude outwardly, and on outer surfaces of the second edge, first holes are formed. A bezel has a first sidewall and a second sidewall, wherein on the first sidewall, second holes are formed, and on outer surfaces of the second sidewall, second hooks are formed to protrude outwardly. When the frame is mounted onto the bezel, the first edge is disposed onto inside surfaces of the first sidewall, and the first hooks are inserted and engaged in the second holes for fastening the frame and bezel, simultaneously the second edge is disposed onto the outside surfaces of the second sidewall, and the second hooks are inserted and engaged in the first holes for fastening the frame and the bezel.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: December 20, 2005
    Assignee: AU Optronics Corp.
    Inventors: Chi-Chih Chu, Wen-Yuan Cheng, Hui-Kai Chou
  • Publication number: 20050275074
    Abstract: A semiconductor package comprising a substrate and a semiconductor device disposed on the substrate by flip-chip bonding. The present invention is characterized by a connection structure disposed between the semiconductor device and the substrate that extends along the periphery of the bottom surface of the semiconductor device. As a result, it can preferably provide additional mounting support between the two. The connection structure can be formed from cured adhesive. The present invention also provides a method of manufacturing the semiconductor package.
    Type: Application
    Filed: June 14, 2004
    Publication date: December 15, 2005
    Inventors: Gwo-Liang Weng, Yung-Li Lu, Chi-Chih Chu, Shih-Chang Lee
  • Publication number: 20050185397
    Abstract: A direct backlight module and assembly method thereof. The direct light type backlight module has a light diffusing plate, a frame, a reflective back plate, and a light source. The light diffusing plate has a first positioning portion on an edge of the light diffusing plate. The frame has a groove corresponding to the light diffusing plate, and a second positioning portion corresponding to the first positioning portion is provided in the groove. The reflective back plate is provided on a side of the frame, forming a cavity between the reflective back plate and the light diffusing plate for disposition of the light source. In assembly, the light diffusing plate is slotted in the groove of the frame to form a light diffusing module, and the light diffusing module is assembled with the reflective back plate and the light source to form the direct backlight module.
    Type: Application
    Filed: May 28, 2004
    Publication date: August 25, 2005
    Inventor: Chi-Chih Chu
  • Publication number: 20050146054
    Abstract: The present invention provides an electronic packaging process. The surface of the chip carrier includes at least a chip attachment region and a film attachment region adjacent to the chip attachment region. At least a baffle is formed on the surface of the chip carrier, between the chip attachment region and the film attachment region. After attaching the thin film to the film attachment region of the chip carrier through an affixture layer, the chip is electrically and physically connected to the chip attachment region of the chip carrier through an adhesive layer. The baffle can effectively prevent the gas that is released from the adhesive layer from damaging the bonding between the thin film and the affixture layer. Therefore, almost no bubbles are formed and good electrical connection between the thin film and the affixture layer is maintained.
    Type: Application
    Filed: January 3, 2005
    Publication date: July 7, 2005
    Inventors: Chi-Chih Chu, Gwo-Liang Weng, Shih-Chang Lee
  • Patent number: 6866397
    Abstract: A leading wire arrangement in a lighting fixture with back light module provides a set of connecting wire led from the lighting fixture to a rear side of the back light module via a lateral wall of the back light module.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: March 15, 2005
    Assignee: AU Optronics Corporation
    Inventors: Wen-Yuan Cheng, Chi-Chih Chu
  • Publication number: 20040080952
    Abstract: An assembling structure of a backlight module for containing and fabricating components of the backlight module comprises following components. A frame has a first edge and a second edge, wherein on outer surfaces of the first edge first hooks are fabricated and protruding outwardly, and on outer surfaces of the second edge first holes are formed. A bezel has a first sidewall and a second sidewall, wherein on the first sidewall second holes are formed, and on outer surfaces of the second sidewall second hooks are formed and protruding outwardly. When the frame is mounted onto the bezel, the first edge is disposed onto inside surfaces of the first sidewall, and the first hooks are inserted and engaged in the second holes for fastening the frame and bezel, simultaneously the second edge is disposed onto outside surfaces of the second sidewall, and the second hooks are inserted and engaged in the first holes for fastening the frame and the bezel.
    Type: Application
    Filed: May 28, 2003
    Publication date: April 29, 2004
    Applicant: AU Optronics Corp.
    Inventors: Chi-Chih Chu, Wen-Yuan Cheng, Hui-Kai Chou
  • Publication number: 20030165057
    Abstract: A leading wire arrangement in a lighting fixture with back light module provides a set of connecting wire led from the lighting fixture to a rear side of the back light module via a lateral wall of the back light module.
    Type: Application
    Filed: January 24, 2003
    Publication date: September 4, 2003
    Applicant: AU Optronics Corporation
    Inventors: Wen-Yuan Cheng, Chi-Chih Chu