Patents by Inventor Chi Chih Lin
Chi Chih Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250072496Abstract: An environment-friendly cartridge is provided. The environment-friendly cartridge includes a body portion. The body portion has two end surfaces and an annular side surface connected to the two end surfaces. The body portion is composed of a smoke generating material. A plurality of gas communication structures are formed on the body portion. A plurality of openings in communication with the plurality of gas communication structures are formed on the two end surfaces. A pressure drop between 30 millimeters of water and 300 millimeters of water exists between the two end surfaces of the environment-friendly cartridge. The cartridge includes no filter and no cigarette paper, can be harmlessly degraded, and is environmentally friendly.Type: ApplicationFiled: July 9, 2024Publication date: March 6, 2025Applicant: KING-DEEM ENTERPRISE CO., LTD.Inventors: Chi-Chih Lin, Qing-Quan Ma
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Publication number: 20250058924Abstract: A composite tray includes a tray body and an external supporting member. The tray body includes a loading plate and a plurality of side walls. The side walls protrude from the loading plate. The side walls and the loading plate jointly form an accommodating groove, and the accommodating groove has an opening. The external supporting member includes a supporting plate and a plurality of assembly members. The supporting plate is located in the accommodating groove and divides the accommodating groove into an inner space and an outer space. The inner space is located between the supporting plate and the loading plate. The outer space is located between the opening and the supporting plate. The assembly members are connected around the supporting plate and respectively assembled to the side walls, and a thickness of the supporting plate is less than a thickness of the loading plate.Type: ApplicationFiled: December 15, 2023Publication date: February 20, 2025Inventors: Chi-Chih Lin, Hsin-Chih Chen
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Publication number: 20110316016Abstract: An LED chip package structure includes a substrate; a first circuit pattern disposed on a surface of the substrate, wherein the first circuit pattern is divided into an electrical connection portion and a carrier portion; a second circuit pattern disposed on another surface of the substrate; a plurality of vias disposed in the substrate and connecting the first circuit pattern and the second circuit pattern, wherein the vias are filled with conductive material; and a plurality of LED chips disposed on the carrier portion of the substrate and electrically connected with the electrical connection portion. The vias filled with the conductive material are utilized to enhance heat dissipation of the substrate.Type: ApplicationFiled: May 19, 2011Publication date: December 29, 2011Inventor: Chi Chih LIN
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Patent number: 8074112Abstract: Systems, apparatuses, and methods for memory backup in a redundant array of independent disks (RAID) system are described. The methods include detecting a failure in a main power supply that supplies power to a volatile memory that is coupled to a RAID controller, switching to a temporary power supply to supply power to the volatile memory in response to detecting the main power supply failure, and transferring data from the volatile memory to a non-volatile memory coupled to the RAID controller subsequent to switching to the temporary power supply.Type: GrantFiled: December 5, 2008Date of Patent: December 6, 2011Assignee: Marvell International Ltd.Inventors: Lihan Chang, Chee Hoe Chu, Chi-Chih Lin, Wei Zhou
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Patent number: 8072063Abstract: An LED lamp module includes a heat sink element having one-piece form; a circuit substrate affixed onto the heat sink element, wherein the substrate has at least an opening exposing the heat sink element, and has an area smaller than that of the heat sink element; a plurality of LED chips mounted on the exposed portion of the heat sink element and electrically connected to the circuit substrate; and a light transparent package material, encapsulating the plurality of LED chips, wherein the heat sink element includes a uniform temperature plate or a plate including at least a vacuum cavity, and an extension part extending laterally from the plate and turned to surround the plurality of LED chips, forming a secondary optical structure. A fabrication method for the LED lamp module is also disclosed. Existing fabrication process is simplified and the cost is lowered with increased heat dissipation effect.Type: GrantFiled: May 27, 2009Date of Patent: December 6, 2011Assignee: Light Ocean Technology Corp.Inventors: Bill Chuang, Chi Chih Lin
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Patent number: 8013434Abstract: The present invention discloses a package substrate comprising an insulative carrier having a through-hole penetrating the top and bottom surfaces thereof; at least one first and second conductive layers comprising circuits respectively formed on the top and bottom surfaces and covering an opening of the through-hole; a conductive element set in the through-hole for electrically connecting the first and second conductive layers; a first metal layer formed on the first and/or the second conductive layer; and at least one chip receiving bay formed by removing a portion of the carrier from the upper to the lower surfaces until the second conductive layer is exposed for accommodating at least one chip therein on the exposed second conductive layer. The package structure has a reduced overall thickness and an enhanced heat-dissipation effect for the chip and prevents from humidity penetration. A manufacturing method for the package structure is also disclosed.Type: GrantFiled: May 28, 2008Date of Patent: September 6, 2011Assignee: Light Ocean Technology Corp.Inventors: Chi Chih Lin, Bo Sun, Hung Jen Wang, Jen Feng Tseng
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Publication number: 20100301365Abstract: A manufacture method of light emitting diode (LED) module includes: providing a carrier board including a carrying area and a shaping area; arranging at least one substrate having at least one circuit layer in the carrying area of the carrier board; arranging at least one LED in the carrying area of the carrier board; electrically connecting the LED to the circuit layer of the substrate; encapsulating the LED and at least part of the circuit layer by at least one light transmissive encapsulation element; and fabricating the shaping area of the carrier board into a desired appearance. The above-mentioned carrier board not only can be a heat sink but also can be easily fabricated into various types of design shapes. Therefore, a light emitting diode module manufactured by the above-mentioned method has preferred heat dissipation effects and a better appearance with relatively low production costs.Type: ApplicationFiled: May 21, 2010Publication date: December 2, 2010Applicant: TAIWAN SOLUTIONS SYSTEMS CORP.Inventors: BILL CHUANG, CHI Chih LIN
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Publication number: 20090302345Abstract: An LED lamp module is disclosed. An LED die is directly mounted on a heat sink element and then the LED chip is electrically connected to a circuit substrate or a circuit layer disposed over the heat sink element, wherein the size of the heat sink element is larger than the circuit layer or the substrate thereon, thereby providing the LED lamp module excellent heat dissipation. The structure of the LED lamp of the present invention simplifies the existing fabrication process, lowers the cost, and also increases the heat dissipation effect.Type: ApplicationFiled: May 27, 2009Publication date: December 10, 2009Inventors: Bill CHUANG, Chi Chih Lin
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Publication number: 20090294952Abstract: The present invention discloses a chip package carrier and a fabrication method, which have the advantages of high reliability, thickness reduction and the scale reduction. The carrier and the method uses blind holes., which penetrates the substrate but external traces and external bonding pads, which cover the external traces. A chip can be installed and encapsulated directly on a first surface.Type: ApplicationFiled: May 28, 2008Publication date: December 3, 2009Applicant: Taiwan Solutions Systems Corp.Inventors: Chi Chih Lin, Bo Sun, Hung Jen Wang, Jen Feng Tseng
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Publication number: 20080315239Abstract: The present invention discloses a manufacture method for a thin double-sided package substrate, which includes steps: providing a carrier; respectively forming a first conductive layer and a second conductive layer on the upper and lower surfaces of the carrier; forming a through-hole penetrating the first conductive layer and the carrier but not penetrating the second conductive layer; setting a conductive element in the through-hole to electrically connect the first conductive layer with the second conductive layer; forming desired circuits on the first conductive layer and/or the second conductive layer; forming a first metal layer on the first conductive layer and/or the second conductive layer; and removing the carrier located in a predetermined region to form a chip receiving bay.Type: ApplicationFiled: May 28, 2008Publication date: December 25, 2008Applicant: Taiwan Solutions System Corp.Inventors: Chi Chih Lin, Bo Sun, Hung Jen Wang, Jen Feng Tseng
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Publication number: 20080217759Abstract: A chip package substrate includes multiple pairs of connection pads. Both pads of a connection pad pair are separated from each other with a distance, which is smaller than the side length of a chip. An insulation layer is configured on the connection pads but exposes a portion of the surface of each of connection pads, and then a contact pad is configured on the exposed surface of each of connection pads. Thus, the connection pads are moved inwardly to under the chip carrier area to reduce the size of the chip package.Type: ApplicationFiled: March 6, 2007Publication date: September 11, 2008Inventors: Chi Chih Lin, Bo Sun, Hung Jen Wang
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Publication number: 20080182360Abstract: A fabrication method of a semiconductor package is applied to fabricate the package with the lead frame. The fabrication method includes: performing a surface treatment on a carrier; electroplating a plurality of metal-stacked layers on the surface of the carrier, wherein the top of the metal-stacked layer is a bonding surface and the bottom of the metal-stacked layer is a welding surface; performing a chip bonding step; forming a molding compound on the carrier; removing the carrier and performing a dicing step to form a plurality of semiconductor packages. The fabrication method of a semiconductor package also includes that forming a plurality of cavities on the carrier surface, electroplating the metal-stacked layer on the cavities, and then performing the chip bonding step, forming the molding compound on the carrier; remove the carrier and performing the dicing step. Using the foregoing steps can prevent the overflow situation without using any tape.Type: ApplicationFiled: October 10, 2007Publication date: July 31, 2008Inventors: Chi Chih Lin, Bo Sun, Hung Jen Wang, Jen Feng Tseng
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Publication number: 20080135939Abstract: A fabrication method of semiconductor and a structure thereof are disclosed herein. The present invention includes: providing a substrate; disposing a mask on the substrate, wherein the mask has a plurality of patterned openings to expose portions of the substrate; forming a metal layer on the exposed portions of the substrate; forming a surface treatment layer on the metal layer; removing the mask; performing a chip package step; and removing the substrate and the metal layer to form a height difference of semiconductor package with pads. The characteristic of the height difference not only can increase the thickness of the solder materials but also can easily check the soldering status.Type: ApplicationFiled: December 7, 2007Publication date: June 12, 2008Inventors: Chi Chih Lin, Bo Sun, Hung Jen Wang, Jen Feng Tseng
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Publication number: 20070194430Abstract: A substrate of chip package and the chip package structure thereof centralizes the bonding area under a chip carrier area and protrudes the bonding area from the chip carrier area to a chip package so as to increase the reliability of bump type surface mount technology during the second-level electronic assembly. Furthermore, the carrier for produce the substrate is recyclable during the chip package procedure so as to reduce the production cost.Type: ApplicationFiled: January 29, 2007Publication date: August 23, 2007Inventors: Chi Chih Lin, Bo Sun, Hung Jen Wang